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Convert tests to RWStructuredBuffer
This change will prevent any texture interpretation that may have occurred on the RWBuffer objects.
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3 files changed

+219
-201
lines changed

3 files changed

+219
-201
lines changed

‎test/Basic/idiv-warp.test

Lines changed: 64 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -1,59 +1,64 @@
1-
2-
3-
#--- source.hlsl
4-
RWBuffer<int> Buf : register(u0);
5-
RWBuffer<int> Zeros : register(u1);
6-
RWBuffer<int> NegOnes : register(u2);
7-
8-
[numthreads(8,1,1)]
9-
void main(uint3 TID : SV_GroupThreadID) {
10-
if (TID.x >= 5)
11-
return;
12-
13-
Zeros[TID.x] = Buf[TID.x] / Zeros[TID.x];
14-
NegOnes[TID.x] = Buf[TID.x] / NegOnes[TID.x];
15-
}
16-
//--- pipeline.yaml
17-
---
18-
DispatchSize: [1, 1, 1]
19-
DescriptorSets:
20-
- Resources:
21-
- Access: ReadWrite
22-
Format: Int32
23-
Data: [ 1, -1, 2147483647, -2147483648, 0]
24-
DirectXBinding:
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Register: 0
26-
Space: 0
27-
- Access: ReadWrite
28-
Format: Int32
29-
Data: [ 0, 0, 0, 0, 0]
30-
DirectXBinding:
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Register: 1
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Space: 0
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- Access: ReadWrite
34-
Format: Int32
35-
Data: [ -1, -1, -1, -1, -1]
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DirectXBinding:
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Register: 2
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Space: 0
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...
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#--- end
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# UNSUPPORTED: Clang
43-
# RUN: split-file %s %t
44-
# RUN: dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl
45-
# RUN: %gpu-exec %t/pipeline.yaml %t.dxil -warp | FileCheck %s
46-
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# REQUIRES: DirectX-WARP
48-
# The behavior of division by zero and edge cases for division by negative one
49-
# is undefined in HLSL with SM 6.0. WARP's behavior is different from other
50-
# drivers so it is captured separately in this test.
51-
52-
# CHECK: Access: ReadWrite
53-
# CHECK: Access: ReadWrite
54-
# CHECK-NEXT: Format: Int32
55-
# CHECK-NEXT: Data: [ 2147483647, 2147483647, 2147483647, 2147483647,
56-
# CHECK-NEXT: 2147483647 ]
57-
# CHECK: Access: ReadWrite
58-
# CHECK-NEXT: Format: Int32
59-
# CHECK-NEXT: Data: [ -1, 1, -2147483647, 2147483647, 0 ]
1+
2+
3+
#--- source.hlsl
4+
RWStructuredBuffer<int> Buf : register(u0);
5+
RWStructuredBuffer<int> Zeros : register(u1);
6+
RWStructuredBuffer<int> NegOnes : register(u2);
7+
8+
[numthreads(8,1,1)]
9+
void main(uint3 TID : SV_GroupThreadID) {
10+
if (TID.x >= 5)
11+
return;
12+
13+
Zeros[TID.x] = Buf[TID.x] / Zeros[TID.x];
14+
NegOnes[TID.x] = Buf[TID.x] / NegOnes[TID.x];
15+
}
16+
//--- pipeline.yaml
17+
---
18+
DispatchSize: [1, 1, 1]
19+
DescriptorSets:
20+
- Resources:
21+
- Access: ReadWrite
22+
Format: Int32
23+
RawSize: 4
24+
Data: [ 1, -1, 2147483647, -2147483648, 0]
25+
DirectXBinding:
26+
Register: 0
27+
Space: 0
28+
- Access: ReadWrite
29+
Format: Int32
30+
RawSize: 4
31+
Data: [ 0, 0, 0, 0, 0]
32+
DirectXBinding:
33+
Register: 1
34+
Space: 0
35+
- Access: ReadWrite
36+
Format: Int32
37+
RawSize: 4
38+
Data: [ -1, -1, -1, -1, -1]
39+
DirectXBinding:
40+
Register: 2
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Space: 0
42+
...
43+
#--- end
44+
45+
# UNSUPPORTED: Clang
46+
# RUN: split-file %s %t
47+
# RUN: dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl
48+
# RUN: %gpu-exec %t/pipeline.yaml %t.dxil -warp | FileCheck %s
49+
50+
# REQUIRES: DirectX-WARP
51+
# The behavior of division by zero and edge cases for division by negative one
52+
# is undefined in HLSL with SM 6.0. WARP's behavior is different from other
53+
# drivers so it is captured separately in this test.
54+
55+
# CHECK: Access: ReadWrite
56+
# CHECK: Access: ReadWrite
57+
# CHECK-NEXT: Format: Int32
58+
# CHECK-NEXT: RawSize: 4
59+
# CHECK-NEXT: Data: [ 2147483647, 2147483647, 2147483647, 2147483647,
60+
# CHECK-NEXT: 2147483647 ]
61+
# CHECK: Access: ReadWrite
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# CHECK-NEXT: Format: Int32
63+
# CHECK-NEXT: RawSize: 4
64+
# CHECK-NEXT: Data: [ -1, 1, -2147483647, 2147483647, 0 ]

‎test/Basic/idiv.test

Lines changed: 69 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -1,64 +1,69 @@
1-
#--- source.hlsl
2-
RWBuffer<int> Buf : register(u0);
3-
RWBuffer<int> Zeros : register(u1);
4-
RWBuffer<int> NegOnes : register(u2);
5-
6-
[numthreads(8,1,1)]
7-
void main(uint3 TID : SV_GroupThreadID) {
8-
if (TID.x >= 5)
9-
return;
10-
11-
Zeros[TID.x] = Buf[TID.x] / Zeros[TID.x];
12-
NegOnes[TID.x] = Buf[TID.x] / NegOnes[TID.x];
13-
}
14-
//--- pipeline.yaml
15-
---
16-
DispatchSize: [1, 1, 1]
17-
DescriptorSets:
18-
- Resources:
19-
- Access: ReadWrite
20-
Format: Int32
21-
Data: [ 1, -1, 2147483647, -2147483648, 0]
22-
DirectXBinding:
23-
Register: 0
24-
Space: 0
25-
- Access: ReadWrite
26-
Format: Int32
27-
Data: [ 0, 0, 0, 0, 0]
28-
DirectXBinding:
29-
Register: 1
30-
Space: 0
31-
- Access: ReadWrite
32-
Format: Int32
33-
Data: [ -1, -1, -1, -1, -1]
34-
DirectXBinding:
35-
Register: 2
36-
Space: 0
37-
...
38-
#--- end
39-
40-
# UNSUPPORTED: Clang
41-
# XFAIL: DirectX-WARP
42-
# RUN: split-file %s %t
43-
# RUN: %if DirectX %{ dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl %}
44-
# RUN: %if DirectX %{ %gpu-exec %t/pipeline.yaml %t.dxil | FileCheck %s %}
45-
# RUN: %if Vulkan %{ dxc -T cs_6_0 -spirv -Fo %t.spv %t/source.hlsl %}
46-
# RUN: %if Vulkan %{ %gpu-exec %t/pipeline.yaml %t.spv | FileCheck %s %}
47-
# RUN: %if Metal %{ dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl %}
48-
# RUN: %if Metal %{ metal-shaderconverter %t.dxil -o=%t.metallib %}
49-
# RUN: %if Metal %{ %gpu-exec %t/pipeline.yaml %t.metallib | FileCheck %s %}
50-
51-
# XFAIL: DirectX-Intel
52-
# On Intel drivers N/0 returns INT_MAX for N >= 0, and INT_MIN for N < 0.
53-
# Oddly enough, Vulkan-Intel works just fine...
54-
55-
# XFAIL: Metal
56-
# On Metal 0/0 = 0, but other platforms n/0 = -1.
57-
58-
# CHECK: Access: ReadWrite
59-
# CHECK: Access: ReadWrite
60-
# CHECK-NEXT: Format: Int32
61-
# CHECK-NEXT: Data: [ -1, -1, -1, -1, -1 ]
62-
# CHECK: Access: ReadWrite
63-
# CHECK-NEXT: Format: Int32
64-
# CHECK-NEXT: Data: [ -1, 1, -2147483647, -2147483648, 0 ]
1+
#--- source.hlsl
2+
RWStructuredBuffer<int> Buf : register(u0);
3+
RWStructuredBuffer<int> Zeros : register(u1);
4+
RWStructuredBuffer<int> NegOnes : register(u2);
5+
6+
[numthreads(8,1,1)]
7+
void main(uint3 TID : SV_GroupThreadID) {
8+
if (TID.x >= 5)
9+
return;
10+
11+
Zeros[TID.x] = Buf[TID.x] / Zeros[TID.x];
12+
NegOnes[TID.x] = Buf[TID.x] / NegOnes[TID.x];
13+
}
14+
//--- pipeline.yaml
15+
---
16+
DispatchSize: [1, 1, 1]
17+
DescriptorSets:
18+
- Resources:
19+
- Access: ReadWrite
20+
Format: Int32
21+
RawSize: 4
22+
Data: [ 1, -1, 2147483647, -2147483648, 0]
23+
DirectXBinding:
24+
Register: 0
25+
Space: 0
26+
- Access: ReadWrite
27+
Format: Int32
28+
RawSize: 4
29+
Data: [ 0, 0, 0, 0, 0]
30+
DirectXBinding:
31+
Register: 1
32+
Space: 0
33+
- Access: ReadWrite
34+
Format: Int32
35+
RawSize: 4
36+
Data: [ -1, -1, -1, -1, -1]
37+
DirectXBinding:
38+
Register: 2
39+
Space: 0
40+
...
41+
#--- end
42+
43+
# UNSUPPORTED: Clang
44+
# XFAIL: DirectX-WARP
45+
# RUN: split-file %s %t
46+
# RUN: %if DirectX %{ dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl %}
47+
# RUN: %if DirectX %{ %gpu-exec %t/pipeline.yaml %t.dxil | FileCheck %s %}
48+
# RUN: %if Vulkan %{ dxc -T cs_6_0 -spirv -Fo %t.spv %t/source.hlsl %}
49+
# RUN: %if Vulkan %{ %gpu-exec %t/pipeline.yaml %t.spv | FileCheck %s %}
50+
# RUN: %if Metal %{ dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl %}
51+
# RUN: %if Metal %{ metal-shaderconverter %t.dxil -o=%t.metallib %}
52+
# RUN: %if Metal %{ %gpu-exec %t/pipeline.yaml %t.metallib | FileCheck %s %}
53+
54+
# XFAIL: DirectX-Intel
55+
# On Intel drivers N/0 returns INT_MAX for N >= 0, and INT_MIN for N < 0.
56+
# Oddly enough, Vulkan-Intel works just fine...
57+
58+
# XFAIL: Metal
59+
# On Metal 0/0 = 0, but other platforms n/0 = -1.
60+
61+
# CHECK: Access: ReadWrite
62+
# CHECK: Access: ReadWrite
63+
# CHECK-NEXT: Format: Int32
64+
# CHECK-NEXT: RawSize: 4
65+
# CHECK-NEXT: Data: [ -1, -1, -1, -1, -1 ]
66+
# CHECK: Access: ReadWrite
67+
# CHECK-NEXT: Format: Int32
68+
# CHECK-NEXT: RawSize: 4
69+
# CHECK-NEXT: Data: [ -1, 1, -2147483647, -2147483648, 0 ]

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