diff --git a/test/Feature/HLSLLib/asuint16.fp16.test b/test/Feature/HLSLLib/asuint16.fp16.test
new file mode 100644
index 00000000..6d35f6dc
--- /dev/null
+++ b/test/Feature/HLSLLib/asuint16.fp16.test
@@ -0,0 +1,61 @@
+#--- source.hlsl
+StructuredBuffer<half4> In0 : register(t0);
+RWStructuredBuffer<uint16_t4> Out0 : register(u1);
+
+[numthreads(1,1,1)]
+void main() {
+
+  Out0[0] = asuint16(In0[0]);
+  Out0[1] = uint16_t4(asuint16(In0[1].xyz), asuint16(In0[1].w));
+  Out0[2] = uint16_t4(asuint16(In0[2].xy), asuint16(In0[2].zw));
+  Out0[3] = asuint16(half4(-5, 0, 10.111, 0.05));
+}
+//--- pipeline.yaml
+
+---
+Shaders:
+  - Stage: Compute
+    Entry: main
+    DispatchSize: [1, 1, 1]
+Buffers:
+  - Name: In0
+    Format: Float16
+    Stride: 8
+    Data: [0xc500, 0, 0x490e, 0x2a66, 0xbc00, 0x5640, 0xc500, 0, 0x490e, 0x2a66, 0xbc00, 0x5640]
+    # [-5, 0, 10.111, 0.05, -1, 100, -5, 0, 10.111, 0.05, -1, 100]
+  - Name: Out0
+    Format: UInt16
+    Stride: 8
+    ZeroInitSize: 32
+  - Name: ExpectedOut0
+    Format: UInt16
+    Stride: 8
+    Data: [ 50432, 0, 18702, 10854, 48128, 22080, 50432, 0, 18702, 10854, 48128, 22080, 50432, 0, 18702, 10854 ]
+Results:
+  - Result: Test0
+    Rule: BufferExact
+    Actual: Out0
+    Expected: ExpectedOut0
+DescriptorSets:
+  - Resources:
+    - Name: In0
+      Kind: StructuredBuffer
+      DirectXBinding:
+        Register: 0
+        Space: 0
+      VulkanBinding:
+        Binding: 0
+    - Name: Out0
+      Kind: RWStructuredBuffer
+      DirectXBinding:
+        Register: 1
+        Space: 0
+      VulkanBinding:
+        Binding: 1
+#--- end
+
+# REQUIRES: Int16
+# REQUIRES: Half
+# RUN: split-file %s %t
+# RUN: %dxc_target -T cs_6_5 -enable-16bit-types -Fo %t.o %t/source.hlsl
+# RUN: %offloader %t/pipeline.yaml %t.o
diff --git a/test/Feature/HLSLLib/asuint16.int16.test b/test/Feature/HLSLLib/asuint16.int16.test
new file mode 100644
index 00000000..8cffe691
--- /dev/null
+++ b/test/Feature/HLSLLib/asuint16.int16.test
@@ -0,0 +1,96 @@
+#--- source.hlsl
+StructuredBuffer<uint16_t4> In0 : register(t0);
+StructuredBuffer<int16_t4> In1 : register(t1);
+RWStructuredBuffer<uint16_t4> Out0 : register(u2);
+RWStructuredBuffer<uint16_t4> Out1 : register(u3);
+
+[numthreads(1,1,1)]
+void main() {
+
+  Out0[0] = asuint16(In0[0]);
+  Out0[1] = uint16_t4(asuint16(In0[1].xyz), asuint16(In0[1].w));
+  Out0[2] = uint16_t4(asuint16(In0[2].xy), asuint16(In0[2].zw));
+  Out0[3] = asuint16(uint16_t4(0, 100, 65535, 10));
+  
+  Out1[0] = asuint16(In1[0]);
+  Out1[1] = uint16_t4(asuint16(In1[1].xyz), asuint16(In1[1].w));
+  Out1[2] = uint16_t4(asuint16(In1[2].xy), asuint16(In1[2].zw));
+  Out1[3] = asuint16(int16_t4(0, 32767, -100, -32768));
+}
+//--- pipeline.yaml
+
+---
+Shaders:
+  - Stage: Compute
+    Entry: main
+    DispatchSize: [1, 1, 1]
+Buffers:
+  - Name: In0
+    Format: UInt16
+    Stride: 8
+    Data: [0, 100, 65535, 10, 20, 30, 40, 50, 60, 70, 80, 6000]
+  - Name: In1
+    Format: Int16
+    Stride: 8
+    Data: [0, 32767, -100, -32768, 10, 20, 30, 6000, -3000, -30000, 50, 60]
+  - Name: Out0
+    Format: UInt16
+    Stride: 8
+    ZeroInitSize: 32
+  - Name: ExpectedOut0
+    Format: UInt16
+    Stride: 8
+    Data: [0, 100, 65535, 10, 20, 30, 40, 50, 60, 70, 80, 6000, 0, 100, 65535, 10]
+  - Name: Out1
+    Format: UInt16
+    Stride: 8
+    ZeroInitSize: 32
+  - Name: ExpectedOut1
+    Format: UInt16
+    Stride: 8
+    Data: [ 0, 32767, 65436, 32768, 10, 20, 30, 6000, 62536, 35536, 50, 60, 0, 32767, 65436, 32768 ]
+Results:
+  - Result: Test0
+    Rule: BufferExact
+    Actual: Out0
+    Expected: ExpectedOut0
+  - Result: Test1
+    Rule: BufferExact
+    Actual: Out1
+    Expected: ExpectedOut1
+DescriptorSets:
+  - Resources:
+    - Name: In0
+      Kind: StructuredBuffer
+      DirectXBinding:
+        Register: 0
+        Space: 0
+      VulkanBinding:
+        Binding: 0
+    - Name: In1
+      Kind: StructuredBuffer
+      DirectXBinding:
+        Register: 1
+        Space: 0
+      VulkanBinding:
+        Binding: 1
+    - Name: Out0
+      Kind: RWStructuredBuffer
+      DirectXBinding:
+        Register: 2
+        Space: 0
+      VulkanBinding:
+        Binding: 2
+    - Name: Out1
+      Kind: RWStructuredBuffer
+      DirectXBinding:
+        Register: 3
+        Space: 0
+      VulkanBinding:
+        Binding: 3
+#--- end
+
+# REQUIRES: Int16
+# RUN: split-file %s %t
+# RUN: %dxc_target -enable-16bit-types -T cs_6_5 -Fo %t.o %t/source.hlsl
+# RUN: %offloader %t/pipeline.yaml %t.o