diff --git a/test/WaveOps/WaveActiveMax.test b/test/Feature/WaveOps/EdgeConditions/WaveActiveMax.test
similarity index 64%
rename from test/WaveOps/WaveActiveMax.test
rename to test/Feature/WaveOps/EdgeConditions/WaveActiveMax.test
index ba50a77c2..0a819a566 100644
--- a/test/WaveOps/WaveActiveMax.test
+++ b/test/Feature/WaveOps/EdgeConditions/WaveActiveMax.test
@@ -4,12 +4,12 @@ RWStructuredBuffer<float> Infs : register(u1);
 RWStructuredBuffer<float> NegInfs : register(u2);
 RWStructuredBuffer<float> Mix : register(u3);
 
-[numthreads(32,1,1)]
-void main(uint3 TID : SV_GroupThreadID) {
-  Nans[TID.x % 8] = WaveActiveMax(Nans[TID.x % 8]);
-  Infs[TID.x % 8] = WaveActiveMax(Infs[TID.x % 8]);
-  NegInfs[TID.x % 8] = WaveActiveMax(NegInfs[TID.x % 8]);
-  Mix[TID.x % 8] = WaveActiveMax(Mix[TID.x % 8]);
+[numthreads(4,1,1)]
+void main(uint GID : SV_GroupIndex) {
+  Nans[GID] = WaveActiveMax(Nans[GID]);
+  Infs[GID] = WaveActiveMax(Infs[GID]);
+  NegInfs[GID] = WaveActiveMax(NegInfs[GID]);
+  Mix[GID] = WaveActiveMax(Mix[GID]);
 }
 //--- pipeline.yaml
 
@@ -66,11 +66,10 @@ DescriptorSets:
 #--- end
 
 # RUN: split-file %s %t
-# RUN: %if !Vulkan %{ %dxc_target -T cs_6_0 -Fo %t.o %t/source.hlsl %}
-# RUN: %if Vulkan %{ %dxc_target -T cs_6_0 -fspv-target-env=vulkan1.2 -Fo %t.o %t/source.hlsl %}
-# RUN: %offloader %t/pipeline.yaml %t.o | FileCheck %s
-
-# The behavior of this operation is consistent on Metal, so the test verifies that behavior.
+# RUN: %dxc_target -T cs_6_0 -Gis -Fo %t.o %t/source.hlsl
+# RUN: %offloader %t/pipeline.yaml %t.o | FileCheck %s \
+# RUN: %if Metal %{ --check-prefixes=CHECK,NAN %} \
+# RUN: %else %{ --check-prefixes=CHECK,NO_NAN %}
 
 # The SPIR-V Spec for OpGroupNonUniformFMax says:
 # > From the set of Value(s) provided by active invocations within a subgroup,
@@ -80,27 +79,21 @@ DescriptorSets:
 
 # This makes Vulkan undefined for cases where all values are nan.
 
-# Also SPIR-V states:
-# > The identity I for Operation is -INF.
-
-# This makes it defined that any lane value of -INF is ignored.
+# DirectX driver implementations seem to match SPIR-V.
 
-# DirectX driver implementations seem to match SPIR-V, except WARP, which does
-# not treat -INF as an identity.
+# Metal also is consistent except that it preserves NaN.
 
-# XFAIL: DirectX-WARP
 
 # CHECK: Name: Nans
 # CHECK-NEXT: Format: Float32
-# METAL-NEXT: Data: [ 0, 0, 0, 0 ]
-# DX-NEXT: Data:
-# VULKAN-NEXT: Data:
+# NAN-NEXT: Data: [ nan, nan, nan, nan ]
+# NO_NAN-NEXT: Data:
 # CHECK: Name: Infs
 # CHECK-NEXT: Format: Float32
 # CHECK-NEXT: Data: [ inf, inf, inf, inf ]
 # CHECK: Name: NegInfs
 # CHECK-NEXT: Format: Float32
-# CHECK-NEXT: Data: [ 0, 0, 0, 0 ]
+# CHECK-NEXT: Data: [ -inf, -inf, -inf, -inf ]
 # CHECK: Name: Mix
 # CHECK-NEXT: Format: Float32
 # CHECK-NEXT: Data: [ inf, inf, inf, inf ]