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content/devmtg/2013-11.md

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---
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title: "2013 LLVM Developers' Meeting"
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description: ""
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date: 2013-11-06T19:45:19+05:30
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toc: true
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tags: []
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draft: false
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---
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{{< event_data "2013-11" >}}
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## About
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**What**: The seventh general meeting of LLVM Developers and Users.
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**Sponsored by [Apple](http://apple.com/), [Google](http://www.google.com/), [QuIC](http://www.qualcomm.com/quicinc/), and [Codeplay Software](http://www.codeplay.com/)**
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The meeting serves as a forum for [LLVM](http://llvm.org/), [Clang](http://clang.llvm.org/), [LLDB](http://lldb.llvm.org/), and other LLVM project developers and users to get acquainted, learn how LLVM is used, and exchange ideas about LLVM and its (potential) applications. More broadly, we believe the event will be of particular interest to the following people:
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- Active developers of projects in the LLVM Umbrella (LLVM core, Clang, LLDB, libc++, compiler_rt, klee, dragonegg, lld, etc).
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- Anyone interested in using these as part of another project.
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- Compiler, programming language, and runtime enthusiasts.
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- Those interested in using compiler and toolchain technology in novel and interesting ways.
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We also invite you to sign up for the [official Developer Meeting mailing list](http://lists.llvm.org/mailman/listinfo/llvm-devmeeting) to be kept informed of updates concerning the meeting.
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## Talk Abstracts
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{{< event_talks
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"devmtg/2013-11/talk_abstracts"
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"talk_abstracts"
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>}}
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## Poster Abstracts
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{{< event_talks
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"devmtg/2013-11/posters"
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"posters"
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>}}
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## Lightning Talk Abstracts
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{{< event_talks
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"devmtg/2013-11/lightning_talks"
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"lightning_talks"
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>}}
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## BoF Abstracts
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{{< event_talks
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"devmtg/2013-11/birds_of_a_feather"
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"birds_of_a_feather"
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>}}
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birds_of_a_feather:
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- title: "BOF: Performance Tracking & Benchmarking Infrastructure"
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speaker: "Kristof Beyls (ARM)"
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slides_url: ""
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video_url: ""
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description: "We lack a good public infrastructure to efficiently track performance improvements/regressions. As a small step to improve on the current situation, I propose to organize a BoF to discuss mainly the following topics: (a) What advantages do we want the performance tracking and benchmarking infrastructure to give us? (b) What are the main technical and non-technical challenges we expect for setting up an infrastructure?"
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- title: "BOF: TableNextGen"
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speaker: "Mihail Popa (ARM)"
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slides_url: ""
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video_url: ""
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description: "TableGen is an essential component of the LLVM ecosystem, and the time has come to consider its evolution. The largest issues are the lack of formal specification, the mixing of logical concepts, and the unsuitability for automated generation. The aim of this BoF is to gather ideas toward an improved specification language that follows the generally accepted criteria for domain-specific languages: well-defined domain meta-models, formally defined semantics, simplicity, expressiveness, and lack of redundancy."
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- title: "BOF: Debug Info"
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speaker: "Eric Christopher (Google)"
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slides_url: ""
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video_url: ""
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description: ""
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- title: "BOF: Extending the Sanitizer tools and porting them to other platforms"
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speaker: "Kostya Serebryany (Google), Alexey Samsonov (Google), Evgeniy Stepanov (Google)"
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slides_url: ""
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video_url: ""
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description: ""
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- title: "BOF: High Level Loop Optimization / Polly"
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speaker: "Tobias Grosser (INRIA), Sebastian Pop (QuIC), Zino Benaissa (QuIC)"
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slides_url: ""
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video_url: ""
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description: "Discussions about loop optimizations, both generic ones as well as polyhedral loop optimizations as implemented in Polly. Topics include the pass order for high-level loop optimizations, scalar evolution, dependence analysis, high-level loop optimizations in core LLVM, the polyhedral infrastructure of Polly, as well as the isl polyhedral support library."
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- title: "BOF: Optimizations using LTO"
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speaker: "Zino Benaissa (QuIC)"
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slides_url: ""
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video_url: ""
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description: ""
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- title: "BOF: JIT & MCJIT"
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speaker: "Andy Kaylor (Intel Corporation)"
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slides_url: ""
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video_url: ""
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description: ""
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lightning_talks:
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- title: "Fixing MC for ARM v7-A: Just a few corner cases – how hard can it be?"
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speaker: "Mihail Popa (ARM)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Popa-MCARM.pdf"
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video_url: "https://youtu.be/FU7R2OQJBRA"
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description: "In 2012, MC Hammer was presented as a testing infrastructure to exhaustively verify the MC layer implementation for the ARM backend. Within ARM we have been working to fix any bugs and we have reached the point where all but one problem remains unsolved. Some of the issues discovered in this process have proven to be excessively difficult to fix. The purpose of the presentation is to give a brief rundown of the major headaches and to suggest possible courses of action for improving LLVM infrastructure."
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- title: "VLIW Support in the MC Layer"
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speaker: "Mario Guerra (Qualcomm Innovation Center, Incorporated)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Guerra-VLIW.pdf"
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video_url: "https://youtu.be/XpvoWFvNqc8"
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description: "Modern DSP architectures such as Hexagon use VLIW instruction packets, which are not well suited to the single instruction streaming model of the LLVM MC layer. Developing an assembler for Hexagon presents unique challenges in the MC layer, especially since Hexagon leverages an optimizing assembler to achieve maximum performance. It is possible to support VLIW within the MC layer by treating every MC instruction as a bundle, and adding all instructions in a packet as sub instruction operands. Furthermore, subclassing MCInst to create a target-specific type of MCInst allows us to capture packet information that will be used to make optimization decisions prior to emitting the code to object format."
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- title: "Link-Time Optimization without Linker Support"
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speaker: "Yunzhong Gao (Sony Computer Entertainment America)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Gao-LTO.pdf"
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video_url: "https://youtu.be/G5qRJsnVE_k"
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description: "LLVM's plugin for the Gold linker enables link-time optimization (LTO). But the toolchain for PlayStation®4 does not include Gold. Here's how we achieved LTO without a bitcode-aware linker."
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- title: "A comparison of the DWARF debugging information produced by LLVM and GCC"
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speaker: "Keith Walker (ARM)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Walker-DWARF.pdf"
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video_url: "https://youtu.be/dH_-hivshcA"
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description: "This talk explores the quality of the DWARF debugging information generated by LLVM by comparing it with that produced by GCC for ARM/AArch64 based targets. It highlights where LLVM's debugging information is superior to that generated by GCC and also where there are deficiencies and scope for further development. I will also explain how these difference translate into good or bad debug experiences for users of LLVM."
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- title: "aarch64 neon work"
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speaker: "Ana Pazos (QuIC), Jiangning Liu (ARM)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Pazos-Aarch64.pdf"
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video_url: "https://youtu.be/m6klgtQI39E"
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description: "ARM and Qualcomm are implementing aarch64 advanced SIMD (neon) instruction set. We as a joint team will be implementing all of 25 classes of neon instructions on MC layer as well as all of ACLE(ARM C Language Extension) intrinsics on C level. Our talk will highlight the design choice of unique arm_neon.h for both ARM(aarch32) and aarch64, appropriate decision making of value types on LLVM IR for generating SISD instruction classes, the patterns’ qualities in .td files by reducing LLVM IR intrinsics, and all of the test categories to build a robust back-end. Finally, we’d like to mention some future plan like enabling machine instruction based scheduler, and performance tuning etc."
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- title: "JavaScript JIT with LLVM"
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speaker: "Filip Pizlo (Apple Inc.)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Pizlo-JavascriptJIT.pdf"
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video_url: "https://youtu.be/VzvJ8YyKtxQ"
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description: "Dynamic languages present unique challenges for compilation, such as the need for type speculation and self-modifying code. This talk shows how to add support for these features to LLVM and use them to implement a JIT for JavaScript."
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- title: "Debug Info Quick Update"
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speaker: "Eric Christopher (Google Inc.)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Christopher-DebugInfo.pdf"
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video_url: "https://youtu.be/m2PSaxCj3PI"
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description: "A quick update on what's been going on in debug info support since the Euro meeting."
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- title: "lld a linker framework"
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speaker: "Shankar Easwaran (Qualcomm Innovation Centre)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Easwaran-LLD.pdf"
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video_url: "https://youtu.be/exQRMExCydY"
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description: "The lld project is working towards becoming a production-quality linker targeting PECOFF, Darwin, and ELF formats. The lld project is under heavy development. The talk discusses how lld achieves universal linking and how it is moving towards becoming a linker framework that could be an integral part of LLVM. The talk continues by exposing new opportunities with linking such as lld APIs, symbol resolution improvements, link-time optimizations (LTO), and enhancing the user experience by providing diagnostics and user-driven inputs that drive linker behavior."

data/devmtg/2013-11/posters.yml

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posters:
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- title: "Finding a few needles in some large haystacks: Identifying missing target optimizations using a superoptimizer"
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speaker: "Hal Finkel (Argonne National Laboratory)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Finkel-Poster.pdf"
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video_url: ""
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description: "So you're developing an LLVM backend, and you've added a bunch of TableGen patterns, custom DAG combines and other lowering code; are you done? This poster describes the development of a specialized superoptimizer, applied to the output of the compiler on large codebases, to look for missing optimizations in the PowerPC backend. This superoptimizer extracts potentially-interesting instruction sequences from assembly code, and then uses the open-source CVC4 SMT solver to search for provably-correct shorter alternatives."
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- title: "Intel® AVX-512 Architecture. Comprehensive vector extension for HPC and enterprise"
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speaker: "Elena Demikhovsky (Intel® Software and Services Group - Israel)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Demikhovsky-Poster.pdf"
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video_url: ""
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description: "Knights Landing (KNL) is the second generation of the Intel® MIC architecture-based products. KNL will support Intel® Advanced Vector Extensions 512 instruction set architecture, a significant leap in SIMD support. This new ISA, designed with unprecedented level of richness, offers a new level of support and opportunities for vectorizing compilers to target efficiently. The poster presents Intel® AVX-512 ISA and shows how the new capabilities may be used in LLVM compiler."
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- title: "Fracture: Inverting the Target Independent Code Generator"
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speaker: "Richard T. Carback III (Charles Stark Draper Laboratories)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Carback-Poster.pdf"
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video_url: ""
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description: "Fracture is a TableGen backend and associated library that ingests a basic block of target instructions and emits a DAG which resembles the post-legalization phase of LLVM’s SelectionDAG instruction selection process. It leverages the pre-existing target TableGen definitions, without modification, to provide a generic way to abstract LLVM IR efficiently from different target instruction sets. Fracture can speed up a variety of applications and also enable generic implementations of a number of static and dynamic analysis tools. Examples include interactive debuggers or disassemblers that provide LLVM IR representations to users unfamiliar with the instruction set, static analysis algorithms that solve indirect control transfer (ICT) problems modified for IR to use KLEE or other LLVM technologies, and IR-based decompilers or emulators extended to work on machine binaries."
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- title: "Automatic generation of LLVM backends from LISA"
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speaker: "Jeroen Dobbelaere (Synopsys)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Dobbelaere-Poster.pdf"
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video_url: ""
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description: "LISA (language for instruction-set architectures) allows for the efficient specification of processor architectures, including non-standard, customized architectures. Using a LISA input specification designers can automatically generate instruction-set simulator, assembler, linker, debugger interface as well as RTL. We have extended LISA to allow for the generation of a LLVM compiler backend tailored to the custom architecture. This work includes the development of a new scheduler that is able to handle hazards with high latency and delay slots, expanding the applicability of LLVM to a wider range of architectures. The LISA-based design flow allows for rapid architectural explorations, profiling dozens of different processors architectures within hours, with the automatic generation of a LLVM compiler being a key enabler of this design methodology."
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- title: "clad - Automatic Differentiation with Clang"
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speaker: "Violeta Ilieva (Princeton University), Vassil Vassilev (CERN)"
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slides_url: "https://llvm.org/devmtg/2013-11/slides/Vassilev-Poster.pdf"
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video_url: ""
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description: "Automatic differentiation (AD) evaluates the derivative of a function specified in a computer program by applying a set of techniques to change the semantics of that function. Unlike other methods for differentiation, such as numerical and symbolic, AD yields machine-precision derivatives even of complicated functions at relatively low processing and storage costs. We would like to present our AD tool, clad - a clang plugin that derives C++ functions through implementing source code transformation and employing the chain rule of differential calculus in its forward mode. That is, clad decomposes the original functions into elementary statements and generates their derivatives with respect to the user-defined independent variables. The combination of these intermediate expressions forms additional source code, built through modifying clang’s abstract syntax tree (AST) along the control flow. Compared to other tools, clad has the advantage of relying on clang and llvm modules for parsing the original program. It uses clang's plugin mechanism for constructing the derivative's AST representation, for generating executable code, and for performing global analysis. Thus it results in low maintenance, high compatibility, and excellent performance."

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