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[RISCV] Swap source register operands in QC_SHLADD ISEL patterns (llvm#149697)
The instruction does `rd = (rs1 << shamt) + rs2` but the ISEL patterns had `rs1` and `rs2` the other way around which is incorrect. (cherry picked from commit 84e689b)
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+21
-21
lines changed

2 files changed

+21
-21
lines changed

‎llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1377,9 +1377,9 @@ let Predicates = [HasVendorXqciac, IsRV32] in {
13771377
def : Pat<(i32 (add GPRNoX0:$rd, (mul GPRNoX0:$rs1, simm12:$imm12))),
13781378
(QC_MULIADD GPRNoX0:$rd, GPRNoX0:$rs1, simm12:$imm12)>;
13791379
def : Pat<(i32 (add_like_non_imm12 (shl GPRNoX0:$rs1, uimm5gt3:$imm), GPRNoX0:$rs2)),
1380-
(QC_SHLADD GPRNoX0:$rs2, GPRNoX0:$rs1, uimm5gt3:$imm)>;
1380+
(QC_SHLADD GPRNoX0:$rs1, GPRNoX0:$rs2, uimm5gt3:$imm)>;
13811381
def : Pat<(i32 (riscv_shl_add GPRNoX0:$rs1, uimm5gt3:$imm, GPRNoX0:$rs2)),
1382-
(QC_SHLADD GPRNoX0:$rs2, GPRNoX0:$rs1, uimm5gt3:$imm)>;
1382+
(QC_SHLADD GPRNoX0:$rs1, GPRNoX0:$rs2, uimm5gt3:$imm)>;
13831383
} // Predicates = [HasVendorXqciac, IsRV32]
13841384

13851385
/// Simple arithmetic operations

‎llvm/test/CodeGen/RISCV/xqciac.ll‎

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -231,12 +231,12 @@ define dso_local i32 @pow2(i32 %a, i32 %b) local_unnamed_addr #0 {
231231
;
232232
; RV32IMXQCIAC-LABEL: pow2:
233233
; RV32IMXQCIAC: # %bb.0: # %entry
234-
; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a1, 5
234+
; RV32IMXQCIAC-NEXT: qc.shladd a0, a1, a0, 5
235235
; RV32IMXQCIAC-NEXT: ret
236236
;
237237
; RV32IZBAMXQCIAC-LABEL: pow2:
238238
; RV32IZBAMXQCIAC: # %bb.0: # %entry
239-
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a1, 5
239+
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a1, a0, 5
240240
; RV32IZBAMXQCIAC-NEXT: ret
241241
entry:
242242
%mul = mul nsw i32 %b, 32
@@ -276,12 +276,12 @@ define dso_local i32 @shladd(i32 %a, i32 %b) local_unnamed_addr #0 {
276276
;
277277
; RV32IMXQCIAC-LABEL: shladd:
278278
; RV32IMXQCIAC: # %bb.0: # %entry
279-
; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a1, 31
279+
; RV32IMXQCIAC-NEXT: qc.shladd a0, a1, a0, 31
280280
; RV32IMXQCIAC-NEXT: ret
281281
;
282282
; RV32IZBAMXQCIAC-LABEL: shladd:
283283
; RV32IZBAMXQCIAC: # %bb.0: # %entry
284-
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a1, 31
284+
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a1, a0, 31
285285
; RV32IZBAMXQCIAC-NEXT: ret
286286
entry:
287287
%shl = shl nsw i32 %b, 31
@@ -305,9 +305,9 @@ define dso_local i64 @shladd64(i64 %a, i64 %b) local_unnamed_addr #0 {
305305
; RV32IMXQCIAC-LABEL: shladd64:
306306
; RV32IMXQCIAC: # %bb.0: # %entry
307307
; RV32IMXQCIAC-NEXT: srli a4, a2, 1
308-
; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a2, 31
308+
; RV32IMXQCIAC-NEXT: qc.shladd a0, a2, a0, 31
309309
; RV32IMXQCIAC-NEXT: slli a2, a2, 31
310-
; RV32IMXQCIAC-NEXT: qc.shladd a3, a4, a3, 31
310+
; RV32IMXQCIAC-NEXT: qc.shladd a3, a3, a4, 31
311311
; RV32IMXQCIAC-NEXT: sltu a2, a0, a2
312312
; RV32IMXQCIAC-NEXT: add a1, a1, a3
313313
; RV32IMXQCIAC-NEXT: add a1, a1, a2
@@ -316,9 +316,9 @@ define dso_local i64 @shladd64(i64 %a, i64 %b) local_unnamed_addr #0 {
316316
; RV32IZBAMXQCIAC-LABEL: shladd64:
317317
; RV32IZBAMXQCIAC: # %bb.0: # %entry
318318
; RV32IZBAMXQCIAC-NEXT: srli a4, a2, 1
319-
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a2, 31
319+
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a2, a0, 31
320320
; RV32IZBAMXQCIAC-NEXT: slli a2, a2, 31
321-
; RV32IZBAMXQCIAC-NEXT: qc.shladd a3, a4, a3, 31
321+
; RV32IZBAMXQCIAC-NEXT: qc.shladd a3, a3, a4, 31
322322
; RV32IZBAMXQCIAC-NEXT: sltu a2, a0, a2
323323
; RV32IZBAMXQCIAC-NEXT: add a1, a1, a3
324324
; RV32IZBAMXQCIAC-NEXT: add a1, a1, a2
@@ -338,12 +338,12 @@ define dso_local i32 @shladd_ordisjoint(i32 %a, i32 %b) local_unnamed_addr #0 {
338338
;
339339
; RV32IMXQCIAC-LABEL: shladd_ordisjoint:
340340
; RV32IMXQCIAC: # %bb.0: # %entry
341-
; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a1, 22
341+
; RV32IMXQCIAC-NEXT: qc.shladd a0, a1, a0, 22
342342
; RV32IMXQCIAC-NEXT: ret
343343
;
344344
; RV32IZBAMXQCIAC-LABEL: shladd_ordisjoint:
345345
; RV32IZBAMXQCIAC: # %bb.0: # %entry
346-
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a1, 22
346+
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a1, a0, 22
347347
; RV32IZBAMXQCIAC-NEXT: ret
348348
entry:
349349
%shl = shl nsw i32 %b, 22
@@ -361,13 +361,13 @@ define dso_local i32 @shladdc1c2(i32 %a, i32 %b) local_unnamed_addr #0 {
361361
;
362362
; RV32IMXQCIAC-LABEL: shladdc1c2:
363363
; RV32IMXQCIAC: # %bb.0: # %entry
364-
; RV32IMXQCIAC-NEXT: qc.shladd a0, a1, a0, 5
364+
; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a1, 5
365365
; RV32IMXQCIAC-NEXT: slli a0, a0, 26
366366
; RV32IMXQCIAC-NEXT: ret
367367
;
368368
; RV32IZBAMXQCIAC-LABEL: shladdc1c2:
369369
; RV32IZBAMXQCIAC: # %bb.0: # %entry
370-
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a1, a0, 5
370+
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a1, 5
371371
; RV32IZBAMXQCIAC-NEXT: slli a0, a0, 26
372372
; RV32IZBAMXQCIAC-NEXT: ret
373373
entry:
@@ -388,7 +388,7 @@ define dso_local i32 @shxaddc1c2(i32 %a, i32 %b) local_unnamed_addr #0 {
388388
; RV32IMXQCIAC-LABEL: shxaddc1c2:
389389
; RV32IMXQCIAC: # %bb.0: # %entry
390390
; RV32IMXQCIAC-NEXT: slli a1, a1, 28
391-
; RV32IMXQCIAC-NEXT: qc.shladd a0, a1, a0, 31
391+
; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a1, 31
392392
; RV32IMXQCIAC-NEXT: ret
393393
;
394394
; RV32IZBAMXQCIAC-LABEL: shxaddc1c2:
@@ -417,18 +417,18 @@ define dso_local i64 @shladdc1c264(i64 %a, i64 %b) local_unnamed_addr #0 {
417417
; RV32IMXQCIAC-LABEL: shladdc1c264:
418418
; RV32IMXQCIAC: # %bb.0: # %entry
419419
; RV32IMXQCIAC-NEXT: srli a1, a2, 12
420-
; RV32IMXQCIAC-NEXT: qc.shladd a1, a1, a3, 20
420+
; RV32IMXQCIAC-NEXT: qc.shladd a1, a3, a1, 20
421421
; RV32IMXQCIAC-NEXT: slli a2, a2, 20
422-
; RV32IMXQCIAC-NEXT: qc.shladd a1, a1, a0, 23
422+
; RV32IMXQCIAC-NEXT: qc.shladd a1, a0, a1, 23
423423
; RV32IMXQCIAC-NEXT: mv a0, a2
424424
; RV32IMXQCIAC-NEXT: ret
425425
;
426426
; RV32IZBAMXQCIAC-LABEL: shladdc1c264:
427427
; RV32IZBAMXQCIAC: # %bb.0: # %entry
428428
; RV32IZBAMXQCIAC-NEXT: srli a1, a2, 12
429-
; RV32IZBAMXQCIAC-NEXT: qc.shladd a1, a1, a3, 20
429+
; RV32IZBAMXQCIAC-NEXT: qc.shladd a1, a3, a1, 20
430430
; RV32IZBAMXQCIAC-NEXT: slli a2, a2, 20
431-
; RV32IZBAMXQCIAC-NEXT: qc.shladd a1, a1, a0, 23
431+
; RV32IZBAMXQCIAC-NEXT: qc.shladd a1, a0, a1, 23
432432
; RV32IZBAMXQCIAC-NEXT: mv a0, a2
433433
; RV32IZBAMXQCIAC-NEXT: ret
434434
entry:
@@ -449,13 +449,13 @@ define dso_local i32 @shladdc1equalc2(i32 %a, i32 %b) local_unnamed_addr #0 {
449449
; RV32IMXQCIAC-LABEL: shladdc1equalc2:
450450
; RV32IMXQCIAC: # %bb.0: # %entry
451451
; RV32IMXQCIAC-NEXT: slli a1, a1, 12
452-
; RV32IMXQCIAC-NEXT: qc.shladd a0, a1, a0, 12
452+
; RV32IMXQCIAC-NEXT: qc.shladd a0, a0, a1, 12
453453
; RV32IMXQCIAC-NEXT: ret
454454
;
455455
; RV32IZBAMXQCIAC-LABEL: shladdc1equalc2:
456456
; RV32IZBAMXQCIAC: # %bb.0: # %entry
457457
; RV32IZBAMXQCIAC-NEXT: slli a1, a1, 12
458-
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a1, a0, 12
458+
; RV32IZBAMXQCIAC-NEXT: qc.shladd a0, a0, a1, 12
459459
; RV32IZBAMXQCIAC-NEXT: ret
460460
entry:
461461
%shlc1 = shl nsw i32 %a, 12

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