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lines changed Original file line number Diff line number Diff line change @@ -52,7 +52,7 @@ licensing and training services.
5252#define configUSE_IDLE_HOOK 0
5353#define configMAX_PRIORITIES ( 6 )
5454#define configUSE_TICK_HOOK 0
55- #define configCPU_CLOCK_HZ ( ( unsigned long ) 8000000 )
55+ #define configCPU_CLOCK_HZ ( ( unsigned long ) 11520000 )
5656#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
5757#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 80 )
5858#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 0x4000 ) )
Original file line number Diff line number Diff line change @@ -40,8 +40,8 @@ void uart_init ( uint8_t id )
4040
4141 Chip_UART_Init ( usart_cfg [id ].ptr );
4242
43- /* Standard 19200 baud rate */
44- uart_set_baud ( UART_DEBUG , 19200 );
43+ /* Standard 115200 baud rate */
44+ uart_set_baud ( UART_DEBUG , 115200 );
4545
4646 /* Defaults to 8N1, no parity */
4747 uart_config_data ( UART_DEBUG , ( UART_LCR_WLEN8 | UART_LCR_SBS_1BIT | UART_LCR_PARITY_DIS ) );
Original file line number Diff line number Diff line change @@ -73,7 +73,12 @@ void Chip_SetupIrcClocking(void)
7373 Chip_Clock_EnablePLL (SYSCTL_MAIN_PLL , SYSCTL_PLL_CONNECT );
7474}
7575
76- #define CLOCK_8MHZ
76+ #define CLOCK_11_520MHZ
77+ #ifdef CLOCK_11_520MHZ
78+ #define PLL_M (18-1)
79+ #define PLL_N (1-1)
80+ #define CLK_DIV (25-1)
81+ #endif
7782#ifdef CLOCK_100MHZ
7883#define PLL_M (25-1)
7984#define PLL_N (2-1)
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