[chip, gpio, dv] Added W1's and W0's pattern for GPIOs in in/out mode

Signed-off-by: Kinza Qamar <kqzaman@lowrisc.org>

Author: KinzaQamar

hw/top_chip/dv/env/seq_lib/top_chip_dv_gpio_base_vseq.sv

@@ -8,6 +8,8 @@ class top_chip_dv_gpio_base_vseq extends top_chip_dv_base_vseq;
   // Standard SV/UVM methods
   extern function new(string name = "");
   extern task body();
+  extern virtual task gpio_output_test();
+  extern virtual task gpio_input_test();
 endclass : top_chip_dv_gpio_base_vseq
 
 function top_chip_dv_gpio_base_vseq::new (string name = "");
@@ -17,5 +19,77 @@ endfunction : new
 task top_chip_dv_gpio_base_vseq::body();
   super.body();
   `DV_WAIT(cfg.sw_test_status_vif.sw_test_status == SwTestStatusInTest);
-  // TODO
+  gpio_output_test();
+  gpio_input_test();
 endtask : body
+
+task top_chip_dv_gpio_base_vseq::gpio_output_test();
+  // Disable GPIOs from being driven as chip inputs.
+  cfg.gpio_vif.drive_en({NUM_GPIOS{1'b0}});
+
+  `uvm_info(`gfn, "Starting GPIO output test", UVM_LOW)
+
+  // Wait and check all 0s.
+  `DV_SPINWAIT(wait(cfg.gpio_vif.pins === {NUM_GPIOS{1'b0}});,
+               $sformatf("Timed out waiting for GPIOs == %0h", {NUM_GPIOS{1'b0}}),
+               /*use default_spinwait_timeout_ns*/,
+              `gfn)
+
+  // Check for W1 pattern on the GPIO output pins.
+  for (int i = 0; i < NUM_GPIOS; i++) begin
+    logic [NUM_GPIOS-1:0] exp_gpios = 1 << i;
+    `DV_SPINWAIT(wait(cfg.gpio_vif.pins === exp_gpios);,
+                 $sformatf("Timed out waiting for GPIOs == %0h", exp_gpios),
+                 /*use default_spinwait_timeout_ns*/,
+                `gfn)
+  end
+
+  // Wait and check all 1s.
+  `DV_SPINWAIT(wait(cfg.gpio_vif.pins === {NUM_GPIOS{1'b1}});,
+               $sformatf("Timed out waiting for GPIOs == %0h", {NUM_GPIOS{1'b1}}),
+               /*use default_spinwait_timeout_ns*/,
+              `gfn)
+
+  // Check for W0 pattern on the GPIO output pins.
+  for (int i = 0; i < NUM_GPIOS; i++) begin
+    logic [NUM_GPIOS-1:0] exp_gpios = ~(1 << i);
+    `DV_SPINWAIT(wait(cfg.gpio_vif.pins === exp_gpios);,
+                 $sformatf("Timed out waiting for GPIOs == %0h", exp_gpios),
+                 /*use default_spinwait_timeout_ns*/,
+                `gfn)
+  end
+endtask : gpio_output_test
+
+task top_chip_dv_gpio_base_vseq::gpio_input_test();
+  // Wait and check all zs - this indicates it is safe to drive GPIOs as inputs.
+  `DV_SPINWAIT(wait(cfg.gpio_vif.pins === {NUM_GPIOS{1'bZ}});,
+               $sformatf("Timed out waiting for GPIOs == %0h", {NUM_GPIOS{1'bZ}}),
+               /*use default_spinwait_timeout_ns*/,
+              `gfn)
+
+  cfg.peri_clk_vif.wait_clks(1);
+
+  cfg.gpio_vif.drive({NUM_GPIOS{1'b0}});
+
+  cfg.peri_clk_vif.wait_clks(1);
+
+  `uvm_info(`gfn, "Starting GPIO input test", UVM_LOW)
+
+  // Drive W1 pattern
+  for (int i = 0; i < NUM_GPIOS; i++) begin
+    cfg.gpio_vif.drive(1 << i);
+    cfg.peri_clk_vif.wait_clks(1);
+  end
+
+  cfg.gpio_vif.drive({NUM_GPIOS{1'b1}});
+
+  cfg.peri_clk_vif.wait_clks(1);
+
+  `uvm_info(`gfn, "Starting GPIO input test", UVM_LOW)
+
+  // Drive W0 pattern
+  for (int i = 0; i < NUM_GPIOS; i++) begin
+    cfg.gpio_vif.drive(~(1 << i));
+    cfg.peri_clk_vif.wait_clks(1);
+  end
+endtask : gpio_input_test

sw/device/tests/gpio/smoketest.c

@@ -49,8 +49,58 @@ static bool reg_test(gpio_t gpio)
     return true;
 }
 
+// Verifies GPIOs pins in output direction. This will walk 1's followed by 0's on GPIOs when output
+// mode is enabled.
+static bool output_test(gpio_t gpio)
+{
+    // Enable the GPIOs in output mode
+    gpio_set_all_oe(gpio, 0xFFFFFFFF);
+
+    // Step-1: Set the gpios to all 0s in order to walk 1 on each pin.
+    gpio_write(gpio, 0x0);
+
+    // Step-2: Walk 1 on each pin now and read "data_in" reg on each write to ensure correctness.
+    for (int i = 0; i < GPIO_NUM_PINS; i++) {
+        uint32_t write_val = 1 << i;
+        gpio_write(gpio, write_val);
+        if (write_val != DEV_READ(gpio + GPIO_REG_DATA_IN)) {
+            return false;
+        }
+    }
+
+    // Step-3: Set the gpios to all 1s in order to walk 0 on each pin.
+    gpio_write(gpio, 0xFFFFFFFF);
+
+    // Step-4: Walk 0 on each pin now and read "data_in" reg on each write to ensure correctness.
+    for (int i = 0; i < GPIO_NUM_PINS; i++) {
+        uint32_t write_val = ~(1 << i);
+        gpio_write(gpio, write_val);
+        if (write_val != DEV_READ(gpio + GPIO_REG_DATA_IN)) {
+            return false;
+        }
+    }
+
+    return true;
+}
+
+// Verifies GPIOs pins in input direction. This will walk 1's followed by 0's on GPIOs when input
+// mode is enabled.
+static bool input_test(gpio_t gpio)
+{
+    // Enable the GPIOs in input mode
+    gpio_set_all_oe(gpio, 0x0);
+    for (int i = 0; i < GPIO_NUM_PINS; i++) {
+        uint32_t write_val = 1 << i;
+        if (write_val != DEV_READ(gpio + GPIO_REG_DATA_IN)) {
+            return false;
+        }
+    }
+    return true;
+}
+
 bool test_main()
 {
     gpio_t gpio = mocha_system_gpio();
-    return reg_test(gpio);
+    return (output_test(gpio) & input_test(gpio));
+    // return input_test(gpio);
 }