Loading into DRAM checklist

[ziuziakowska]

Ideally we would like to run SW tests from both SRAM and DRAM. This is a tracking list of requirements so that we can do that:

• DRAM loading for Verilator: Support is being added in DRAM loading in Verilator #392.
• DRAM loading for FPGA: Since the binary is loaded over SPI instead of by backdoor, we will need [bootROM] Enable the SPI 4 bytes address #317 and [bootROM] Write the payload on DRAM and boot #311.
• DRAM loading for DV: DV is a special consideration as (iirc) it can only load a single .vmem file, so a special .vmem containing the boot ROM and test will need to be created for each test.
• Boot ROM SPI loading bypass: Ideally we would like to have one ROM binary used between the different environments, so we need some way to differentiate between FPGA and simulation so that we can skip SPI loading for simulation targets.
• Rework linkerscripts for linking binaries at DRAM.
• ROM support and linkerscripts to put the boot ROM there.