[sw,test] Port entropy_src_fips_mode_health test to DT

Signed-off-by: Robert Schilling <[email protected]>

Author: Razer6

sw/device/tests/BUILD

@@ -1669,6 +1669,7 @@ opentitan_test(
             "//hw/top_earlgrey:fpga_cw340_sival": None,
             "//hw/top_earlgrey:silicon_creator": None,
         },
+        DARJEELING_TEST_ENVS,
     ),
     # This test uses carefully tuned health test threshold values to trigger health test alerts
     # inside ENTROPY_SRC. Due to the probabilistic nature of the analog noise source producing the
@@ -1684,7 +1685,7 @@ opentitan_test(
     verilator = verilator_params(timeout = "long"),
     deps = [
         ":otbn_randomness_impl",
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//hw/top:dt",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:mmio",
         "//sw/device/lib/dif:aes",

sw/device/tests/entropy_src_fips_mode_health_test.c

@@ -3,6 +3,12 @@
 // SPDX-License-Identifier: Apache-2.0
 
 #include "hw/ip/aes/model/aes_modes.h"
+#include "hw/top/dt/dt_aes.h"
+#include "hw/top/dt/dt_alert_handler.h"
+#include "hw/top/dt/dt_csrng.h"
+#include "hw/top/dt/dt_edn.h"
+#include "hw/top/dt/dt_entropy_src.h"
+#include "hw/top/dt/dt_otbn.h"
 #include "sw/device/lib/base/bitfield.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/mmio.h"
@@ -24,7 +30,6 @@
 #include "sw/device/tests/otbn_randomness_impl.h"
 
 #include "hw/top/entropy_src_regs.h"  // autogenerated
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
 #define TIMEOUT (1000 * 1000)
 
@@ -47,17 +52,13 @@ status_t init_test_environment(void) {
   LOG_INFO(
       "Initializing modules entropy_src, csrng, edn0, edn1, aes, otbn and "
       "alert_handler...");
-  TRY(dif_entropy_src_init(
-      mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR), &entropy_src));
-  TRY(dif_csrng_init(mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR),
-                     &csrng));
-  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR), &edn0));
-  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR), &edn1));
-  TRY(dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
-  TRY(dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn));
-  TRY(dif_alert_handler_init(
-      mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR),
-      &alert_handler));
+  TRY(dif_entropy_src_init_from_dt(kDtEntropySrc, &entropy_src));
+  TRY(dif_csrng_init_from_dt(kDtCsrng, &csrng));
+  TRY(dif_edn_init_from_dt(kDtEdn0, &edn0));
+  TRY(dif_edn_init_from_dt(kDtEdn1, &edn1));
+  TRY(dif_aes_init_from_dt(kDtAes, &aes));
+  TRY(dif_otbn_init_from_dt(kDtOtbn, &otbn));
+  TRY(dif_alert_handler_init_from_dt(kDtAlertHandler, &alert_handler));
   return OK_STATUS();
 }