[multitop] port sleep_pin_mio_dio_val_test to devicetables

Signed-off-by: Gary Guo <[email protected]>

Author: nbdd0121

sw/device/tests/BUILD

@@ -7332,14 +7332,11 @@ opentitan_test(
     # in CI/nightlies.
     verilator = verilator_params(tags = ["manual"]),
     deps = [
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/base:mmio",
         "//sw/device/lib/dif:pinmux",
         "//sw/device/lib/dif:pwrmgr",
         "//sw/device/lib/dif:rv_plic",
         "//sw/device/lib/runtime:irq",
         "//sw/device/lib/runtime:log",
-        "//sw/device/lib/testing:isr_testutils",
         "//sw/device/lib/testing:pwrmgr_testutils",
         "//sw/device/lib/testing:rand_testutils",
         "//sw/device/lib/testing:rv_plic_testutils",

sw/device/tests/sleep_pin_mio_dio_val_test.c

@@ -2,7 +2,6 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#include "sw/device/lib/base/mmio.h"
 #include "sw/device/lib/dif/dif_pinmux.h"
 #include "sw/device/lib/dif/dif_pwrmgr.h"
 #include "sw/device/lib/dif/dif_rv_plic.h"
@@ -14,9 +13,6 @@
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-#include "sw/device/lib/testing/autogen/isr_testutils.h"
-
 OTTF_DEFINE_TEST_CONFIG();
 
 /**
@@ -38,59 +34,41 @@ OTTF_DEFINE_TEST_CONFIG();
  * the expected and measured values.
  */
 
-/* NUM_MIO_PADS */
-/* NUM_DIO_PADS */
-
-enum { kNumOptOutDio = 2 };
-static const uint8_t kOptOutDio[kNumOptOutDio] = {
-    kTopEarlgreyDirectPadsSpiDeviceSck,
-    kTopEarlgreyDirectPadsSpiDeviceCsb,
+enum { kNumOptOut = 2 };
+static const dt_pad_t kOptOut[] = {
+    kDtPadSpiDeviceSck,
+    kDtPadSpiDeviceCsb,
 };
 
-/**
- * If certain MIOs need to be skipped due to tied functionality, specify here.
- */
-enum { kNumOptOutMio = 0 };
-
-static uint8_t kMioPads[NUM_MIO_PADS] = {0};
-static uint8_t kDioPads[NUM_DIO_PADS] = {0};
+static uint8_t kPads[kDtPadCount] = {0};
 
 // PLIC structures
 static dif_pwrmgr_t pwrmgr;
 static dif_pinmux_t pinmux;
 static dif_rv_plic_t plic;
 
-static plic_isr_ctx_t plic_ctx = {.rv_plic = &plic,
-                                  .hart_id = kTopEarlgreyPlicTargetIbex0};
-
-static pwrmgr_isr_ctx_t pwrmgr_isr_ctx = {
-    .pwrmgr = &pwrmgr,
-    .plic_pwrmgr_start_irq_id = kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
-    .expected_irq = kDifPwrmgrIrqWakeup,
-    .is_only_irq = true};
-
 /**
  * External interrupt handler.
  */
-void ottf_external_isr(uint32_t *exc_info) {
-  dif_pwrmgr_irq_t irq_id;
-  top_earlgrey_plic_peripheral_t peripheral;
-
-  isr_testutils_pwrmgr_isr(plic_ctx, pwrmgr_isr_ctx, &peripheral, &irq_id);
+bool ottf_handle_irq(uint32_t *exc_info, dt_instance_id_t devid,
+                     dif_rv_plic_irq_id_t irq_id) {
+  if (devid != dt_pwrmgr_instance_id(kDtPwrmgrAon)) {
+    return false;
+  }
 
-  // Check that both the peripheral and the irq id is correct
-  CHECK(peripheral == kTopEarlgreyPlicPeripheralPwrmgrAon,
-        "IRQ peripheral: %d is incorrect", peripheral);
-  CHECK(irq_id == kDifPwrmgrIrqWakeup, "IRQ ID: %d is incorrect", irq_id);
+  dt_pwrmgr_irq_t irq = dt_pwrmgr_irq_from_plic_id(kDtPwrmgrAon, irq_id);
+  CHECK(irq == kDtPwrmgrIrqWakeup, "IRQ ID: %d is incorrect", irq);
+  CHECK_DIF_OK(dif_pwrmgr_irq_acknowledge(&pwrmgr, irq));
+  return true;
 }
 
 /** Configure pinmux retention value.
  *
  * Each gen32 can cover 16 PADs randomization. When each pad ret val draws
  * **3**, the code calls gen32_range to choose from 0 to 2.
  */
-void draw_pinmux_ret(const uint32_t num_pins, uint8_t *arr,
-                     const uint8_t *optout, const uint8_t num_optout) {
+void draw_pinmux_ret(uint32_t num_pins, uint8_t *arr, const dt_pad_t *optout,
+                     size_t num_optout) {
   for (uint32_t i = 0; i < num_pins; i += 16) {
     uint32_t val = rand_testutils_gen32();
     uint32_t min_idx = (i + 16 < num_pins) ? i + 16 : num_pins;
@@ -106,7 +84,6 @@ void draw_pinmux_ret(const uint32_t num_pins, uint8_t *arr,
 
   // OptOut processing after draw.
   for (int i = 0; i < num_optout; i++) {
-    CHECK(optout != NULL, "optout must be non-NULL");
     arr[optout[i]] = 2;  // High-Z always
   }
 }
@@ -120,12 +97,18 @@ void draw_pinmux_ret(const uint32_t num_pins, uint8_t *arr,
  */
 void print_chosen_values(void) {
   LOG_INFO("BEGIN Chosen Retention Types");
-  for (int i = 0; i < NUM_MIO_PADS; ++i) {
-    LOG_INFO("MIO [%d]: %x", i, kMioPads[i]);
-  }
-  for (int i = 0; i < NUM_DIO_PADS; ++i) {
-    LOG_INFO("DIO [%d]: %x", i, kDioPads[i]);
+
+  for (dt_pad_t pad = 0; pad < kDtPadCount; ++pad) {
+    dif_pinmux_index_t index;
+    dif_pinmux_pad_kind_t type;
+    CHECK_DIF_OK(dif_pinmux_pad_from_dt_pad(pad, &index, &type));
+    if (type == kDifPinmuxPadKindDio) {
+      LOG_INFO("DIO [%d]: %x", index, kPads[pad]);
+    } else {
+      LOG_INFO("MIO [%d]: %x", index, kPads[pad]);
+    }
   }
+
   LOG_INFO("END Chosen Retention Types");
 }
 
@@ -135,22 +118,13 @@ void print_chosen_values(void) {
  * @param pinmux Pinmux handle.
  */
 void configure_pad_retention_types(dif_pinmux_t *pinmux) {
-  uint8_t io;  // 1 for DIO, 0 for MIO
-  uint32_t max_pads;
-  dif_pinmux_pad_kind_t pad_kind;
-  dif_pinmux_sleep_mode_t pad_mode;
   LOG_INFO("Configuring PADs retention types in PINMUX...");
 
-  // TODO: for loop of writing values to PINMUX CSRs.
-  for (io = 0; io < 2; io++) {
-    max_pads = (io) ? NUM_DIO_PADS : NUM_MIO_PADS;
-    pad_kind = (io) ? kDifPinmuxPadKindDio : kDifPinmuxPadKindMio;
-    for (int i = 0; i < max_pads; i++) {
-      pad_mode = (io) ? (dif_pinmux_sleep_mode_t)(kDioPads[i])
-                      : (dif_pinmux_sleep_mode_t)(kMioPads[i]);
-      CHECK_DIF_OK(dif_pinmux_pad_sleep_enable(pinmux, (dif_pinmux_index_t)i,
-                                               pad_kind, pad_mode));
-    }
+  for (dt_pad_t pad = 0; pad < kDtPadCount; pad++) {
+    dif_pinmux_index_t index;
+    dif_pinmux_pad_kind_t type;
+    CHECK_DIF_OK(dif_pinmux_pad_from_dt_pad(pad, &index, &type));
+    CHECK_DIF_OK(dif_pinmux_pad_sleep_enable(pinmux, index, type, kPads[pad]));
   }
 
   LOG_INFO("PADs retention modes are configured.");
@@ -162,8 +136,7 @@ bool lowpower_prep(dif_pwrmgr_t *pwrmgr, dif_pinmux_t *pinmux, bool deepsleep) {
 
   LOG_INFO("Selecting PADs retention modes...");
 
-  draw_pinmux_ret(NUM_DIO_PADS, kDioPads, kOptOutDio, kNumOptOutDio);
-  draw_pinmux_ret(NUM_MIO_PADS, kMioPads, NULL, kNumOptOutMio);
+  draw_pinmux_ret(kDtPadCount, kPads, kOptOut, kNumOptOut);
 
   print_chosen_values();
 
@@ -192,12 +165,9 @@ bool test_main(void) {
   irq_global_ctrl(true);
   irq_external_ctrl(true);
 
-  CHECK_DIF_OK(dif_pwrmgr_init(
-      mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR), &pwrmgr));
-  CHECK_DIF_OK(dif_pinmux_init(
-      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
-  CHECK_DIF_OK(dif_rv_plic_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &plic));
+  CHECK_DIF_OK(dif_pwrmgr_init_from_dt(kDtPwrmgrAon, &pwrmgr));
+  CHECK_DIF_OK(dif_pinmux_init_from_dt(kDtPinmuxAon, &pinmux));
+  CHECK_DIF_OK(dif_rv_plic_init_from_dt(kDtRvPlic, &plic));
 
   if (UNWRAP(pwrmgr_testutils_is_wakeup_reason(&pwrmgr, 0)) == true) {
     uint32_t deep_powerdown_en = rand_testutils_gen32_range(0, 1);
@@ -207,15 +177,16 @@ bool test_main(void) {
     // disabled for this test. Remove this later.
     dif_pinmux_pad_attr_t out_attr;
     dif_pinmux_pad_attr_t in_attr = {0};
-    CHECK_DIF_OK(dif_pinmux_pad_write_attrs(&pinmux, kTopEarlgreyMuxedPadsIoc3,
-                                            kDifPinmuxPadKindMio, in_attr,
-                                            &out_attr));
+    CHECK_DIF_OK(
+        dif_pinmux_pad_write_attrs_dt(&pinmux, kDtPadIoc3, in_attr, &out_attr));
 
     if (!deepsleep) {
       // Enable all the AON interrupts used in this test.
-      rv_plic_testutils_irq_range_enable(&plic, kTopEarlgreyPlicTargetIbex0,
-                                         kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
-                                         kTopEarlgreyPlicIrqIdPwrmgrAonWakeup);
+      static const uint32_t kPlicTarget = 0;
+      rv_plic_testutils_irq_range_enable(
+          &plic, kPlicTarget,
+          dt_pwrmgr_irq_to_plic_id(kDtPwrmgrAon, kDtPwrmgrIrqWakeup),
+          dt_pwrmgr_irq_to_plic_id(kDtPwrmgrAon, kDtPwrmgrIrqWakeup));
       // Enable pwrmgr interrupt
       CHECK_DIF_OK(dif_pwrmgr_irq_set_enabled(&pwrmgr, 0, kDifToggleEnabled));
     }