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[silicon_creator,ibex] Expand ibex unittest
Properly test the mcycles and rnd32 functions. Signed-off-by: Amaury Pouly <[email protected]>
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sw/device/silicon_creator/lib/drivers/BUILD

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@@ -292,7 +292,7 @@ cc_test(
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name = "ibex_unittest",
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srcs = ["ibex_unittest.cc"],
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deps = [
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":ibex",
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dual_cc_device_library_of(":ibex"),
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"//sw/device/silicon_creator/testing:rom_test",
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"@googletest//:gtest_main",
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],

sw/device/silicon_creator/lib/drivers/ibex_unittest.cc

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@@ -8,12 +8,22 @@
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#include "gtest/gtest.h"
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#include "sw/device/lib/base/mock_abs_mmio.h"
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#include "sw/device/silicon_creator/lib/base/mock_csr.h"
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#include "sw/device/silicon_creator/lib/base/mock_sec_mmio.h"
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#include "sw/device/silicon_creator/testing/rom_test.h"
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#include "hw/top/rv_core_ibex_regs.h"
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#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
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namespace rom_test {
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/* This is somewhat of a hack: ibex_time_to_cycles is really just
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* an alias for to_cpu_cycles so there is no point in testing it or
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* creating a mock just for this. But we need the symbol for the
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* linker to be happy.
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*/
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extern "C" uint64_t to_cpu_cycles(uint64_t usec) { abort(); }
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} // namespace rom_test
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namespace ibex_unittest {
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namespace {
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@@ -22,8 +32,47 @@ class IbexTest : public rom_test::RomTest {
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uint32_t base_ = TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR;
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rom_test::MockSecMmio sec_;
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rom_test::MockAbsMmio mmio_;
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mock_csr::MockCsr csr_;
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};
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class MCycleTest : public IbexTest {};
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TEST_F(MCycleTest, MCycle32) {
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EXPECT_CSR_READ(CSR_REG_MCYCLE, 978465);
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EXPECT_EQ(ibex_mcycle32(), 978465);
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}
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TEST_F(MCycleTest, MCycleSimple) {
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// Simple case where the two reads of MCYCLEH are consistent.
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EXPECT_CSR_READ(CSR_REG_MCYCLEH, 0x42);
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EXPECT_CSR_READ(CSR_REG_MCYCLE, 0xabcdef01);
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EXPECT_CSR_READ(CSR_REG_MCYCLEH, 0x42);
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EXPECT_EQ(ibex_mcycle(), 0x42abcdef01);
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}
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TEST_F(MCycleTest, MCycleComplex) {
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// Complex case where the two reads of MCYCLEH are different.
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EXPECT_CSR_READ(CSR_REG_MCYCLEH, 0x42);
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EXPECT_CSR_READ(CSR_REG_MCYCLE, 0xabcdef01);
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EXPECT_CSR_READ(CSR_REG_MCYCLEH, 0x43);
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EXPECT_CSR_READ(CSR_REG_MCYCLEH, 0x44);
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EXPECT_CSR_READ(CSR_REG_MCYCLE, 0x01234567);
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EXPECT_CSR_READ(CSR_REG_MCYCLEH, 0x44);
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EXPECT_EQ(ibex_mcycle(), 0x4401234567);
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}
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class RndTest : public IbexTest {};
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TEST_F(RndTest, Rnd32) {
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EXPECT_ABS_READ32(base_ + RV_CORE_IBEX_RND_STATUS_REG_OFFSET,
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{{RV_CORE_IBEX_RND_STATUS_RND_DATA_VALID_BIT, false}});
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EXPECT_ABS_READ32(base_ + RV_CORE_IBEX_RND_STATUS_REG_OFFSET,
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{{RV_CORE_IBEX_RND_STATUS_RND_DATA_VALID_BIT, true}});
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EXPECT_ABS_READ32(base_ + RV_CORE_IBEX_RND_DATA_REG_OFFSET, 12345);
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EXPECT_EQ(ibex_rnd32_read(), 12345);
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}
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class AddressTranslationTest : public IbexTest {};
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TEST_F(AddressTranslationTest, Slot0Sucess) {

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