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[topgen,sw] Port autogen SW tests to Darjeeling
This commit ports the autogenerated `plic_all_irqs_test` and `alert_test` software test targets so that they are generated and can be built for the Darjeeling top, like they can already for the Earlgrey top. This is achieved by fixing the test templates to make them no longer Earlgrey-specific, ensuring all address spaces memory mappings are included, and switching to using the autogenerated DIF headers rather than the regular DIF headers (as the autogenerated headers are a subset, sufficient for these tests, and allow us to build tests for Darjeeling where DIFs are still missing). Signed-off-by: Alex Jones <[email protected]>
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‎hw/top_darjeeling/sw/autogen/tests/BUILD‎

Lines changed: 132 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,132 @@
1+
# Copyright lowRISC contributors (OpenTitan project).
2+
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
3+
# SPDX-License-Identifier: Apache-2.0
4+
#
5+
# ------------------- W A R N I N G: A U T O - G E N E R A T E D C O D E !! -------------------#
6+
# PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
7+
# util/topgen.py -t hw/top_darjeeling/data/top_darjeeling.hjson
8+
# -o hw/top_darjeeling
9+
10+
load(
11+
"//rules/opentitan:defs.bzl",
12+
"cw310_params",
13+
"fpga_params",
14+
"opentitan_test",
15+
"silicon_params",
16+
"verilator_params",
17+
)
18+
load("@bazel_skylib//lib:dicts.bzl", "dicts")
19+
20+
package(default_visibility = ["//visibility:public"])
21+
22+
[
23+
opentitan_test(
24+
name = "plic_all_irqs_test_{}".format(min),
25+
srcs = ["plic_all_irqs_test.c"],
26+
copts = [
27+
"-DTEST_MIN_IRQ_PERIPHERAL={}".format(min),
28+
"-DTEST_MAX_IRQ_PERIPHERAL={}".format(min + 10),
29+
],
30+
exec_env = dicts.add(
31+
{
32+
"//hw/top_darjeeling:sim_dv": None,
33+
},
34+
),
35+
verilator = verilator_params(
36+
timeout = "eternal",
37+
tags = [
38+
"flaky",
39+
"manual",
40+
],
41+
# This test can take > 60 minutes, so mark it manual as it
42+
# shouldn't run in CI/nightlies.
43+
# often times out in 3600s on 4 cores
44+
),
45+
deps = [
46+
"//hw/top_darjeeling/sw/autogen:top_darjeeling",
47+
"//sw/device/lib/arch:boot_stage",
48+
"//sw/device/lib/base:mmio",
49+
"//sw/device/lib/dif/autogen:alert_handler",
50+
"//sw/device/lib/dif/autogen:aon_timer",
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"//sw/device/lib/dif/autogen:csrng",
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"//sw/device/lib/dif/autogen:dma",
53+
"//sw/device/lib/dif/autogen:edn",
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"//sw/device/lib/dif/autogen:gpio",
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"//sw/device/lib/dif/autogen:hmac",
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"//sw/device/lib/dif/autogen:i2c",
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"//sw/device/lib/dif/autogen:keymgr_dpe",
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"//sw/device/lib/dif/autogen:kmac",
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"//sw/device/lib/dif/autogen:mbx",
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"//sw/device/lib/dif/autogen:otbn",
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"//sw/device/lib/dif/autogen:otp_ctrl",
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"//sw/device/lib/dif/autogen:pwrmgr",
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"//sw/device/lib/dif/autogen:rv_plic",
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"//sw/device/lib/dif/autogen:rv_timer",
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"//sw/device/lib/dif/autogen:soc_proxy",
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"//sw/device/lib/dif/autogen:spi_device",
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"//sw/device/lib/dif/autogen:spi_host",
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"//sw/device/lib/dif/autogen:uart",
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"//sw/device/lib/runtime:irq",
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"//sw/device/lib/runtime:log",
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"//sw/device/lib/testing:rv_plic_testutils",
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"//sw/device/lib/testing/test_framework:ottf_main",
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],
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)
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for min in range(0, 19, 10)
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]
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78+
test_suite(
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name = "plic_all_irqs_test",
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tests = [
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"plic_all_irqs_test_0",
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"plic_all_irqs_test_10",
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],
84+
)
85+
86+
opentitan_test(
87+
name = "alert_test",
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srcs = ["alert_test.c"],
89+
exec_env = dicts.add(
90+
{
91+
"//hw/top_darjeeling:sim_dv": None,
92+
},
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),
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deps = [
95+
"//hw/top_darjeeling/sw/autogen:top_darjeeling",
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"//sw/device/lib/arch:boot_stage",
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"//sw/device/lib/base:memory",
98+
"//sw/device/lib/base:mmio",
99+
"//sw/device/lib/dif/autogen:aes",
100+
"//sw/device/lib/dif/autogen:alert_handler",
101+
"//sw/device/lib/dif/autogen:aon_timer",
102+
"//sw/device/lib/dif/autogen:clkmgr",
103+
"//sw/device/lib/dif/autogen:csrng",
104+
"//sw/device/lib/dif/autogen:dma",
105+
"//sw/device/lib/dif/autogen:edn",
106+
"//sw/device/lib/dif/autogen:gpio",
107+
"//sw/device/lib/dif/autogen:hmac",
108+
"//sw/device/lib/dif/autogen:i2c",
109+
"//sw/device/lib/dif/autogen:keymgr_dpe",
110+
"//sw/device/lib/dif/autogen:kmac",
111+
"//sw/device/lib/dif/autogen:lc_ctrl",
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"//sw/device/lib/dif/autogen:mbx",
113+
"//sw/device/lib/dif/autogen:otbn",
114+
"//sw/device/lib/dif/autogen:otp_ctrl",
115+
"//sw/device/lib/dif/autogen:pinmux",
116+
"//sw/device/lib/dif/autogen:pwrmgr",
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"//sw/device/lib/dif/autogen:rom_ctrl",
118+
"//sw/device/lib/dif/autogen:rstmgr",
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"//sw/device/lib/dif/autogen:rv_core_ibex",
120+
"//sw/device/lib/dif/autogen:rv_plic",
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"//sw/device/lib/dif/autogen:rv_timer",
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"//sw/device/lib/dif/autogen:soc_dbg_ctrl",
123+
"//sw/device/lib/dif/autogen:soc_proxy",
124+
"//sw/device/lib/dif/autogen:spi_device",
125+
"//sw/device/lib/dif/autogen:spi_host",
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"//sw/device/lib/dif/autogen:sram_ctrl",
127+
"//sw/device/lib/dif/autogen:uart",
128+
"//sw/device/lib/runtime:log",
129+
"//sw/device/lib/testing:alert_handler_testutils",
130+
"//sw/device/lib/testing/test_framework:ottf_main",
131+
],
132+
)

‎hw/top_darjeeling/sw/autogen/tests/alert_test.c‎

Lines changed: 31 additions & 71 deletions
Original file line numberDiff line numberDiff line change
@@ -10,49 +10,46 @@
1010
// -o hw/top_darjeeling
1111
#include "sw/device/lib/arch/boot_stage.h"
1212
#include "sw/device/lib/base/mmio.h"
13-
#include "sw/device/lib/dif/dif_ac_range_check.h"
14-
#include "sw/device/lib/dif/dif_aes.h"
15-
#include "sw/device/lib/dif/dif_alert_handler.h"
16-
#include "sw/device/lib/dif/dif_aon_timer.h"
17-
#include "sw/device/lib/dif/dif_clkmgr.h"
18-
#include "sw/device/lib/dif/dif_csrng.h"
19-
#include "sw/device/lib/dif/dif_dma.h"
20-
#include "sw/device/lib/dif/dif_edn.h"
21-
#include "sw/device/lib/dif/dif_gpio.h"
22-
#include "sw/device/lib/dif/dif_hmac.h"
23-
#include "sw/device/lib/dif/dif_i2c.h"
24-
#include "sw/device/lib/dif/dif_keymgr_dpe.h"
25-
#include "sw/device/lib/dif/dif_kmac.h"
26-
#include "sw/device/lib/dif/dif_lc_ctrl.h"
27-
#include "sw/device/lib/dif/dif_mbx.h"
28-
#include "sw/device/lib/dif/dif_otbn.h"
29-
#include "sw/device/lib/dif/dif_otp_ctrl.h"
30-
#include "sw/device/lib/dif/dif_pinmux.h"
31-
#include "sw/device/lib/dif/dif_pwrmgr.h"
32-
#include "sw/device/lib/dif/dif_racl_ctrl.h"
33-
#include "sw/device/lib/dif/dif_rom_ctrl.h"
34-
#include "sw/device/lib/dif/dif_rstmgr.h"
35-
#include "sw/device/lib/dif/dif_rv_core_ibex.h"
36-
#include "sw/device/lib/dif/dif_rv_plic.h"
37-
#include "sw/device/lib/dif/dif_rv_timer.h"
38-
#include "sw/device/lib/dif/dif_soc_dbg_ctrl.h"
39-
#include "sw/device/lib/dif/dif_soc_proxy.h"
40-
#include "sw/device/lib/dif/dif_spi_device.h"
41-
#include "sw/device/lib/dif/dif_spi_host.h"
42-
#include "sw/device/lib/dif/dif_sram_ctrl.h"
43-
#include "sw/device/lib/dif/dif_uart.h"
13+
#include "sw/device/lib/dif/autogen/dif_aes_autogen.h"
14+
#include "sw/device/lib/dif/autogen/dif_alert_handler_autogen.h"
15+
#include "sw/device/lib/dif/autogen/dif_aon_timer_autogen.h"
16+
#include "sw/device/lib/dif/autogen/dif_clkmgr_autogen.h"
17+
#include "sw/device/lib/dif/autogen/dif_csrng_autogen.h"
18+
#include "sw/device/lib/dif/autogen/dif_dma_autogen.h"
19+
#include "sw/device/lib/dif/autogen/dif_edn_autogen.h"
20+
#include "sw/device/lib/dif/autogen/dif_gpio_autogen.h"
21+
#include "sw/device/lib/dif/autogen/dif_hmac_autogen.h"
22+
#include "sw/device/lib/dif/autogen/dif_i2c_autogen.h"
23+
#include "sw/device/lib/dif/autogen/dif_keymgr_dpe_autogen.h"
24+
#include "sw/device/lib/dif/autogen/dif_kmac_autogen.h"
25+
#include "sw/device/lib/dif/autogen/dif_lc_ctrl_autogen.h"
26+
#include "sw/device/lib/dif/autogen/dif_mbx_autogen.h"
27+
#include "sw/device/lib/dif/autogen/dif_otbn_autogen.h"
28+
#include "sw/device/lib/dif/autogen/dif_otp_ctrl_autogen.h"
29+
#include "sw/device/lib/dif/autogen/dif_pinmux_autogen.h"
30+
#include "sw/device/lib/dif/autogen/dif_pwrmgr_autogen.h"
31+
#include "sw/device/lib/dif/autogen/dif_rom_ctrl_autogen.h"
32+
#include "sw/device/lib/dif/autogen/dif_rstmgr_autogen.h"
33+
#include "sw/device/lib/dif/autogen/dif_rv_core_ibex_autogen.h"
34+
#include "sw/device/lib/dif/autogen/dif_rv_plic_autogen.h"
35+
#include "sw/device/lib/dif/autogen/dif_rv_timer_autogen.h"
36+
#include "sw/device/lib/dif/autogen/dif_soc_dbg_ctrl_autogen.h"
37+
#include "sw/device/lib/dif/autogen/dif_soc_proxy_autogen.h"
38+
#include "sw/device/lib/dif/autogen/dif_spi_device_autogen.h"
39+
#include "sw/device/lib/dif/autogen/dif_spi_host_autogen.h"
40+
#include "sw/device/lib/dif/autogen/dif_sram_ctrl_autogen.h"
41+
#include "sw/device/lib/dif/autogen/dif_uart_autogen.h"
4442
#include "sw/device/lib/testing/alert_handler_testutils.h"
4543
#include "sw/device/lib/testing/test_framework/FreeRTOSConfig.h"
4644
#include "sw/device/lib/testing/test_framework/check.h"
4745
#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
4846

4947
#include "alert_handler_regs.h" // Generated.
50-
#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
48+
#include "hw/top_darjeeling/sw/autogen/top_darjeeling.h"
5149

5250
OTTF_DEFINE_TEST_CONFIG();
5351

5452
static dif_alert_handler_t alert_handler;
55-
static dif_ac_range_check_t ac_range_check;
5653
static dif_aes_t aes;
5754
static dif_aon_timer_t aon_timer_aon;
5855
static dif_clkmgr_t clkmgr_aon;
@@ -80,7 +77,6 @@ static dif_otbn_t otbn;
8077
static dif_otp_ctrl_t otp_ctrl;
8178
static dif_pinmux_t pinmux_aon;
8279
static dif_pwrmgr_t pwrmgr_aon;
83-
static dif_racl_ctrl_t racl_ctrl;
8480
static dif_rom_ctrl_t rom_ctrl0;
8581
static dif_rom_ctrl_t rom_ctrl1;
8682
static dif_rstmgr_t rstmgr_aon;
@@ -101,12 +97,9 @@ static dif_uart_t uart0;
10197
*/
10298
static void init_peripherals(void) {
10399
mmio_region_t base_addr;
104-
base_addr = mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR);
100+
base_addr = mmio_region_from_addr(TOP_DARJEELING_ALERT_HANDLER_BASE_ADDR);
105101
CHECK_DIF_OK(dif_alert_handler_init(base_addr, &alert_handler));
106102

107-
base_addr = mmio_region_from_addr(TOP_DARJEELING_SOC_MBX_AC_RANGE_CHECK_BASE_ADDR);
108-
CHECK_DIF_OK(dif_ac_range_check_init(base_addr, &ac_range_check));
109-
110103
base_addr = mmio_region_from_addr(TOP_DARJEELING_AES_BASE_ADDR);
111104
CHECK_DIF_OK(dif_aes_init(base_addr, &aes));
112105

@@ -188,9 +181,6 @@ static void init_peripherals(void) {
188181
base_addr = mmio_region_from_addr(TOP_DARJEELING_PWRMGR_AON_BASE_ADDR);
189182
CHECK_DIF_OK(dif_pwrmgr_init(base_addr, &pwrmgr_aon));
190183

191-
base_addr = mmio_region_from_addr(TOP_DARJEELING_SOC_MBX_RACL_CTRL_BASE_ADDR);
192-
CHECK_DIF_OK(dif_racl_ctrl_init(base_addr, &racl_ctrl));
193-
194184
base_addr = mmio_region_from_addr(TOP_DARJEELING_ROM_CTRL0_REGS_BASE_ADDR);
195185
CHECK_DIF_OK(dif_rom_ctrl_init(base_addr, &rom_ctrl0));
196186

@@ -291,21 +281,6 @@ static void trigger_alert_test(void) {
291281
bool is_cause;
292282
dif_alert_handler_alert_t exp_alert;
293283

294-
// Write ac_range_check's alert_test reg and check alert_cause.
295-
for (dif_ac_range_check_alert_t i = 0; i < 2; ++i) {
296-
CHECK_DIF_OK(dif_ac_range_check_alert_force(&ac_range_check, kDifAcRangeCheckAlertRecovCtrlUpdateErr + i));
297-
298-
// Verify that alert handler received it.
299-
exp_alert = kTopDarjeelingAlertIdAcRangeCheckRecovCtrlUpdateErr + i;
300-
CHECK_DIF_OK(dif_alert_handler_alert_is_cause(
301-
&alert_handler, exp_alert, &is_cause));
302-
CHECK(is_cause, "Expect alert %d!", exp_alert);
303-
304-
// Clear alert cause register
305-
CHECK_DIF_OK(dif_alert_handler_alert_acknowledge(
306-
&alert_handler, exp_alert));
307-
}
308-
309284
// Write aes's alert_test reg and check alert_cause.
310285
for (dif_aes_alert_t i = 0; i < 2; ++i) {
311286
CHECK_DIF_OK(dif_aes_alert_force(&aes, kDifAesAlertRecovCtrlUpdateErr + i));
@@ -714,21 +689,6 @@ static void trigger_alert_test(void) {
714689
&alert_handler, exp_alert));
715690
}
716691

717-
// Write racl_ctrl's alert_test reg and check alert_cause.
718-
for (dif_racl_ctrl_alert_t i = 0; i < 2; ++i) {
719-
CHECK_DIF_OK(dif_racl_ctrl_alert_force(&racl_ctrl, kDifRaclCtrlAlertFatalFault + i));
720-
721-
// Verify that alert handler received it.
722-
exp_alert = kTopDarjeelingAlertIdRaclCtrlFatalFault + i;
723-
CHECK_DIF_OK(dif_alert_handler_alert_is_cause(
724-
&alert_handler, exp_alert, &is_cause));
725-
CHECK(is_cause, "Expect alert %d!", exp_alert);
726-
727-
// Clear alert cause register
728-
CHECK_DIF_OK(dif_alert_handler_alert_acknowledge(
729-
&alert_handler, exp_alert));
730-
}
731-
732692
// Write rom_ctrl's alert_test reg and check alert_cause.
733693
for (dif_rom_ctrl_alert_t i = 0; i < 1; ++i) {
734694
CHECK_DIF_OK(dif_rom_ctrl_alert_force(&rom_ctrl0, kDifRomCtrlAlertFatal + i));

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