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martin-velayrswarbrick
martin-velay
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[acrc,dv] Introduce ac_range_check_dut_cfg class
- This class is a bundle that contains all the configuration parameters for the DUT. This avoids repeating the variable declaration multiple times. It should be declared in the base sequence to benefit to all the children but it can also be used from the scoreboard. Signed-off-by: Martin Velay <[email protected]>
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-98
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10 files changed

+210
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lines changed

‎hw/ip_templates/ac_range_check/dv/env/ac_range_check_dut_cfg.sv‎

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,56 @@
1+
// Copyright lowRISC contributors (OpenTitan project).
2+
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3+
// SPDX-License-Identifier: Apache-2.0
4+
5+
// This class is a bundle that contains all the configuration parameters for the DUT. This avoids
6+
// repeating the variable declaration multiple times. On the other hand, their constraints must not
7+
// be contained in this file, but directly in the files where they are needed as this may lead to
8+
// some conflicts.
9+
class ac_range_check_dut_cfg extends uvm_object;
10+
rand tl_main_vars_t tl_main_vars;
11+
rand bit [TL_DW-1:0] range_base[NUM_RANGES]; // Granularity is 32-bit words, 2-LSBs are ignored
12+
rand bit [TL_DW-1:0] range_limit[NUM_RANGES]; // Granularity is 32-bit words, 2-LSBs are ignored
13+
rand range_perm_t range_perm[NUM_RANGES];
14+
rand racl_policy_t range_racl_policy[NUM_RANGES];
15+
16+
// Standard SV/UVM methods
17+
extern function new(string name="");
18+
extern function void post_randomize();
19+
extern function void do_print(uvm_printer printer);
20+
21+
// UVM Factory Registration Macro
22+
`uvm_object_utils_begin (ac_range_check_dut_cfg)
23+
`uvm_field_sarray_int(range_base, UVM_DEFAULT)
24+
`uvm_field_sarray_int(range_limit, UVM_DEFAULT)
25+
`uvm_object_utils_end
26+
endclass : ac_range_check_dut_cfg
27+
28+
29+
function ac_range_check_dut_cfg::new(string name="");
30+
super.new(name);
31+
endfunction : new
32+
33+
function void ac_range_check_dut_cfg::post_randomize();
34+
if (uvm_top.get_report_verbosity_level() >= UVM_HIGH) begin
35+
this.print();
36+
end
37+
endfunction : post_randomize
38+
39+
// Some types are unsupported by the macros and have to be implemented manually
40+
function void ac_range_check_dut_cfg::do_print(uvm_printer printer);
41+
`uvm_info(this.get_name(), "do_print function has been called", UVM_DEBUG);
42+
super.do_print(printer);
43+
44+
printer.print_generic("tl_main_vars", "tl_main_vars_t", $bits(tl_main_vars),
45+
$sformatf("%p", tl_main_vars));
46+
47+
foreach (range_perm[i]) begin
48+
printer.print_field($sformatf("range_perm[%0d]", i), "range_perm_t", $bits(range_perm[i]),
49+
$sformatf("%p", range_perm[i]));
50+
end
51+
52+
foreach (range_racl_policy[i]) begin
53+
printer.print_field($sformatf("range_racl_policy[%0d]", i), "racl_policy_t",
54+
$bits(range_racl_policy[i]), $sformatf("%p", range_racl_policy[i]));
55+
end
56+
endfunction: do_print

‎hw/ip_templates/ac_range_check/dv/env/ac_range_check_env.core.tpl‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ filesets:
1313
- lowrisc:dv:dv_lib
1414
files:
1515
- ac_range_check_env_pkg.sv
16+
- ac_range_check_dut_cfg.sv: {is_include_file: true}
1617
- ac_range_check_env_cfg.sv: {is_include_file: true}
1718
- ac_range_check_env_cov.sv: {is_include_file: true}
1819
- ac_range_check_virtual_sequencer.sv: {is_include_file: true}

‎hw/ip_templates/ac_range_check/dv/env/ac_range_check_env_pkg.sv.tpl‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,7 @@ package ac_range_check_env_pkg;
8080
endfunction : get_csr_idx
8181

8282
// Package sources
83+
`include "ac_range_check_dut_cfg.sv"
8384
`include "ac_range_check_env_cfg.sv"
8485
`include "ac_range_check_env_cov.sv"
8586
`include "ac_range_check_virtual_sequencer.sv"

‎hw/ip_templates/ac_range_check/dv/env/seq_lib/ac_range_check_base_vseq.sv‎

Lines changed: 20 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -17,12 +17,8 @@ class ac_range_check_base_vseq extends cip_base_vseq #(
1717
// Various knobs to enable certain routines
1818
bit do_ac_range_check_init = 1'b1;
1919

20-
// Randomized variables
21-
rand tl_main_vars_t tl_main_vars;
22-
rand bit [TL_DW-1:0] range_base[NUM_RANGES]; // Granularity is 32-bit words, 2-LSBs are ignored
23-
rand bit [TL_DW-1:0] range_limit[NUM_RANGES]; // Granularity is 32-bit words, 2-LSBs are ignored
24-
rand range_perm_t range_perm[NUM_RANGES];
25-
rand racl_policy_t range_racl_policy[NUM_RANGES];
20+
// Configuration variables
21+
rand ac_range_check_dut_cfg dut_cfg;
2622

2723
// Constraints
2824
extern constraint tl_main_vars_c;
@@ -44,14 +40,15 @@ endclass : ac_range_check_base_vseq
4440

4541

4642
constraint ac_range_check_base_vseq::tl_main_vars_c {
47-
soft tl_main_vars.rand_write == 1;
48-
soft tl_main_vars.rand_addr == 1;
49-
soft tl_main_vars.rand_mask == 1;
50-
soft tl_main_vars.rand_data == 1;
43+
soft dut_cfg.tl_main_vars.rand_write == 1;
44+
soft dut_cfg.tl_main_vars.rand_addr == 1;
45+
soft dut_cfg.tl_main_vars.rand_mask == 1;
46+
soft dut_cfg.tl_main_vars.rand_data == 1;
5147
}
5248

5349
function ac_range_check_base_vseq::new(string name="");
5450
super.new(name);
51+
dut_cfg = ac_range_check_dut_cfg::type_id::create("dut_cfg");
5552
endfunction : new
5653

5754
task ac_range_check_base_vseq::dut_init(string reset_kind = "HARD");
@@ -81,33 +78,34 @@ endtask : ac_range_check_init
8178

8279
// Only update registers whose value does not match the new one (usage of set+update instead write)
8380
task ac_range_check_base_vseq::cfg_range_base();
84-
foreach (range_base[i]) begin
85-
ral.range_base[i].set(range_base[i]);
81+
foreach (dut_cfg.range_base[i]) begin
82+
ral.range_base[i].set(dut_cfg.range_base[i]);
8683
csr_update(.csr(ral.range_base[i]));
8784
end
8885
endtask : cfg_range_base
8986

9087
task ac_range_check_base_vseq::cfg_range_limit();
91-
foreach (range_limit[i]) begin
92-
ral.range_limit[i].set(range_limit[i]);
88+
foreach (dut_cfg.range_limit[i]) begin
89+
ral.range_limit[i].set(dut_cfg.range_limit[i]);
9390
csr_update(.csr(ral.range_limit[i]));
9491
end
9592
endtask : cfg_range_limit
9693

9794
task ac_range_check_base_vseq::cfg_range_perm();
98-
foreach (range_perm[i]) begin
99-
ral.range_perm[i].set(mubi4_bool_to_mubi(range_perm[i].log_denied_access));
100-
ral.range_perm[i].set(mubi4_bool_to_mubi(range_perm[i].execute_access ));
101-
ral.range_perm[i].set(mubi4_bool_to_mubi(range_perm[i].write_access ));
102-
ral.range_perm[i].set(mubi4_bool_to_mubi(range_perm[i].read_access ));
103-
ral.range_perm[i].set(mubi4_bool_to_mubi(range_perm[i].enable ));
95+
foreach (dut_cfg.range_perm[i]) begin
96+
ral.range_perm[i].log_denied_access.set(mubi4_bool_to_mubi(
97+
dut_cfg.range_perm[i].log_denied_access));
98+
ral.range_perm[i].execute_access.set(mubi4_bool_to_mubi(dut_cfg.range_perm[i].execute_access));
99+
ral.range_perm[i].write_access.set(mubi4_bool_to_mubi(dut_cfg.range_perm[i].write_access));
100+
ral.range_perm[i].read_access.set(mubi4_bool_to_mubi(dut_cfg.range_perm[i].read_access));
101+
ral.range_perm[i].enable.set(mubi4_bool_to_mubi(dut_cfg.range_perm[i].enable));
104102
csr_update(.csr(ral.range_perm[i]));
105103
end
106104
endtask : cfg_range_perm
107105

108106
task ac_range_check_base_vseq::cfg_range_racl_policy();
109-
foreach (range_racl_policy[i]) begin
110-
ral.range_racl_policy_shadowed[i].set(range_racl_policy[i]);
107+
foreach (dut_cfg.range_racl_policy[i]) begin
108+
ral.range_racl_policy_shadowed[i].set(dut_cfg.range_racl_policy[i]);
111109
// Shadowed register: the 2 writes are automatically managed by the csr_utils_pkg
112110
csr_update(.csr(ral.range_racl_policy_shadowed[i]));
113111
end

‎hw/ip_templates/ac_range_check/dv/env/seq_lib/ac_range_check_smoke_vseq.sv‎

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -17,29 +17,29 @@ endclass : ac_range_check_smoke_vseq
1717

1818
// TODO remove this temporary directed constraint
1919
constraint ac_range_check_smoke_vseq::tmp_c {
20-
foreach (range_base[i]) {
21-
range_base[i] == 32'h7654_2500;
22-
range_limit[i] == 32'h7654_2600;
23-
range_perm[i].log_denied_access == 1;
24-
range_perm[i].execute_access == 1;
25-
range_perm[i].write_access == 1;
26-
range_perm[i].read_access == 1;
27-
range_perm[i].enable == 1;
20+
foreach (dut_cfg.range_base[i]) {
21+
dut_cfg.range_base[i] == 32'h7654_2500;
22+
dut_cfg.range_limit[i] == 32'h7654_2600;
23+
dut_cfg.range_perm[i].log_denied_access == 1;
24+
dut_cfg.range_perm[i].execute_access == 1;
25+
dut_cfg.range_perm[i].write_access == 1;
26+
dut_cfg.range_perm[i].read_access == 1;
27+
dut_cfg.range_perm[i].enable == 1;
2828
}
2929
}
3030

3131
// TODO uncomment that constraint
3232
// constraint ac_range_check_smoke_vseq::range_limit_c {
33-
// solve range_base before range_limit;
34-
// foreach (range_limit[i]) {
35-
// range_limit[i] > range_base[i];
33+
// solve dut_cfg.range_base before dut_cfg.range_limit;
34+
// foreach (dut_cfg.range_limit[i]) {
35+
// dut_cfg.range_limit[i] > dut_cfg.range_base[i];
3636
// }
3737
// }
3838

3939
constraint ac_range_check_smoke_vseq::range_racl_policy_c {
40-
foreach (range_racl_policy[i]) {
41-
soft range_racl_policy[i].write_perm == 16'hFFFF;
42-
soft range_racl_policy[i].read_perm == 16'hFFFF;
40+
foreach (dut_cfg.range_racl_policy[i]) {
41+
soft dut_cfg.range_racl_policy[i].write_perm == 16'hFFFF;
42+
soft dut_cfg.range_racl_policy[i].read_perm == 16'hFFFF;
4343
}
4444
}
4545

@@ -49,21 +49,21 @@ endfunction : new
4949

5050
task ac_range_check_smoke_vseq::body();
5151
// TODO, remove this chunk and make it random later
52-
tl_main_vars.rand_write = 0;
53-
tl_main_vars.write = 0;
54-
tl_main_vars.rand_addr = 0;
55-
tl_main_vars.addr = 'h7654_24FF;
56-
tl_main_vars.rand_mask = 0;
57-
tl_main_vars.mask = 'hF;
58-
tl_main_vars.rand_data = 0;
59-
tl_main_vars.data = 'hABCD_FE97;
52+
dut_cfg.tl_main_vars.rand_write = 0;
53+
dut_cfg.tl_main_vars.write = 0;
54+
dut_cfg.tl_main_vars.rand_addr = 0;
55+
dut_cfg.tl_main_vars.addr = 'h7654_24FF;
56+
dut_cfg.tl_main_vars.rand_mask = 0;
57+
dut_cfg.tl_main_vars.mask = 'hF;
58+
dut_cfg.tl_main_vars.rand_data = 0;
59+
dut_cfg.tl_main_vars.data = 'hABCD_FE97;
6060

6161
// Out of range address
62-
send_single_tl_unfilt_tr(tl_main_vars);
62+
send_single_tl_unfilt_tr(dut_cfg.tl_main_vars);
6363

6464
// In range address
65-
tl_main_vars.addr = 'h7654_25F1;
66-
send_single_tl_unfilt_tr(tl_main_vars);
67-
tl_main_vars.addr = 'h7654_2500;
68-
send_single_tl_unfilt_tr(tl_main_vars);
65+
dut_cfg.tl_main_vars.addr = 'h7654_25F1;
66+
send_single_tl_unfilt_tr(dut_cfg.tl_main_vars);
67+
dut_cfg.tl_main_vars.addr = 'h7654_2500;
68+
send_single_tl_unfilt_tr(dut_cfg.tl_main_vars);
6969
endtask : body

‎hw/top_darjeeling/ip_autogen/ac_range_check/dv/env/ac_range_check_dut_cfg.sv‎

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,56 @@
1+
// Copyright lowRISC contributors (OpenTitan project).
2+
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3+
// SPDX-License-Identifier: Apache-2.0
4+
5+
// This class is a bundle that contains all the configuration parameters for the DUT. This avoids
6+
// repeating the variable declaration multiple times. On the other hand, their constraints must not
7+
// be contained in this file, but directly in the files where they are needed as this may lead to
8+
// some conflicts.
9+
class ac_range_check_dut_cfg extends uvm_object;
10+
rand tl_main_vars_t tl_main_vars;
11+
rand bit [TL_DW-1:0] range_base[NUM_RANGES]; // Granularity is 32-bit words, 2-LSBs are ignored
12+
rand bit [TL_DW-1:0] range_limit[NUM_RANGES]; // Granularity is 32-bit words, 2-LSBs are ignored
13+
rand range_perm_t range_perm[NUM_RANGES];
14+
rand racl_policy_t range_racl_policy[NUM_RANGES];
15+
16+
// Standard SV/UVM methods
17+
extern function new(string name="");
18+
extern function void post_randomize();
19+
extern function void do_print(uvm_printer printer);
20+
21+
// UVM Factory Registration Macro
22+
`uvm_object_utils_begin (ac_range_check_dut_cfg)
23+
`uvm_field_sarray_int(range_base, UVM_DEFAULT)
24+
`uvm_field_sarray_int(range_limit, UVM_DEFAULT)
25+
`uvm_object_utils_end
26+
endclass : ac_range_check_dut_cfg
27+
28+
29+
function ac_range_check_dut_cfg::new(string name="");
30+
super.new(name);
31+
endfunction : new
32+
33+
function void ac_range_check_dut_cfg::post_randomize();
34+
if (uvm_top.get_report_verbosity_level() >= UVM_HIGH) begin
35+
this.print();
36+
end
37+
endfunction : post_randomize
38+
39+
// Some types are unsupported by the macros and have to be implemented manually
40+
function void ac_range_check_dut_cfg::do_print(uvm_printer printer);
41+
`uvm_info(this.get_name(), "do_print function has been called", UVM_DEBUG);
42+
super.do_print(printer);
43+
44+
printer.print_generic("tl_main_vars", "tl_main_vars_t", $bits(tl_main_vars),
45+
$sformatf("%p", tl_main_vars));
46+
47+
foreach (range_perm[i]) begin
48+
printer.print_field($sformatf("range_perm[%0d]", i), "range_perm_t", $bits(range_perm[i]),
49+
$sformatf("%p", range_perm[i]));
50+
end
51+
52+
foreach (range_racl_policy[i]) begin
53+
printer.print_field($sformatf("range_racl_policy[%0d]", i), "racl_policy_t",
54+
$bits(range_racl_policy[i]), $sformatf("%p", range_racl_policy[i]));
55+
end
56+
endfunction: do_print

‎hw/top_darjeeling/ip_autogen/ac_range_check/dv/env/ac_range_check_env.core‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ filesets:
1313
- lowrisc:dv:dv_lib
1414
files:
1515
- ac_range_check_env_pkg.sv
16+
- ac_range_check_dut_cfg.sv: {is_include_file: true}
1617
- ac_range_check_env_cfg.sv: {is_include_file: true}
1718
- ac_range_check_env_cov.sv: {is_include_file: true}
1819
- ac_range_check_virtual_sequencer.sv: {is_include_file: true}

‎hw/top_darjeeling/ip_autogen/ac_range_check/dv/env/ac_range_check_env_pkg.sv‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,7 @@ package ac_range_check_env_pkg;
8080
endfunction : get_csr_idx
8181

8282
// Package sources
83+
`include "ac_range_check_dut_cfg.sv"
8384
`include "ac_range_check_env_cfg.sv"
8485
`include "ac_range_check_env_cov.sv"
8586
`include "ac_range_check_virtual_sequencer.sv"

‎hw/top_darjeeling/ip_autogen/ac_range_check/dv/env/seq_lib/ac_range_check_base_vseq.sv‎

Lines changed: 20 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -17,12 +17,8 @@ class ac_range_check_base_vseq extends cip_base_vseq #(
1717
// Various knobs to enable certain routines
1818
bit do_ac_range_check_init = 1'b1;
1919

20-
// Randomized variables
21-
rand tl_main_vars_t tl_main_vars;
22-
rand bit [TL_DW-1:0] range_base[NUM_RANGES]; // Granularity is 32-bit words, 2-LSBs are ignored
23-
rand bit [TL_DW-1:0] range_limit[NUM_RANGES]; // Granularity is 32-bit words, 2-LSBs are ignored
24-
rand range_perm_t range_perm[NUM_RANGES];
25-
rand racl_policy_t range_racl_policy[NUM_RANGES];
20+
// Configuration variables
21+
rand ac_range_check_dut_cfg dut_cfg;
2622

2723
// Constraints
2824
extern constraint tl_main_vars_c;
@@ -44,14 +40,15 @@ endclass : ac_range_check_base_vseq
4440

4541

4642
constraint ac_range_check_base_vseq::tl_main_vars_c {
47-
soft tl_main_vars.rand_write == 1;
48-
soft tl_main_vars.rand_addr == 1;
49-
soft tl_main_vars.rand_mask == 1;
50-
soft tl_main_vars.rand_data == 1;
43+
soft dut_cfg.tl_main_vars.rand_write == 1;
44+
soft dut_cfg.tl_main_vars.rand_addr == 1;
45+
soft dut_cfg.tl_main_vars.rand_mask == 1;
46+
soft dut_cfg.tl_main_vars.rand_data == 1;
5147
}
5248

5349
function ac_range_check_base_vseq::new(string name="");
5450
super.new(name);
51+
dut_cfg = ac_range_check_dut_cfg::type_id::create("dut_cfg");
5552
endfunction : new
5653

5754
task ac_range_check_base_vseq::dut_init(string reset_kind = "HARD");
@@ -81,33 +78,34 @@ endtask : ac_range_check_init
8178

8279
// Only update registers whose value does not match the new one (usage of set+update instead write)
8380
task ac_range_check_base_vseq::cfg_range_base();
84-
foreach (range_base[i]) begin
85-
ral.range_base[i].set(range_base[i]);
81+
foreach (dut_cfg.range_base[i]) begin
82+
ral.range_base[i].set(dut_cfg.range_base[i]);
8683
csr_update(.csr(ral.range_base[i]));
8784
end
8885
endtask : cfg_range_base
8986

9087
task ac_range_check_base_vseq::cfg_range_limit();
91-
foreach (range_limit[i]) begin
92-
ral.range_limit[i].set(range_limit[i]);
88+
foreach (dut_cfg.range_limit[i]) begin
89+
ral.range_limit[i].set(dut_cfg.range_limit[i]);
9390
csr_update(.csr(ral.range_limit[i]));
9491
end
9592
endtask : cfg_range_limit
9693

9794
task ac_range_check_base_vseq::cfg_range_perm();
98-
foreach (range_perm[i]) begin
99-
ral.range_perm[i].set(mubi4_bool_to_mubi(range_perm[i].log_denied_access));
100-
ral.range_perm[i].set(mubi4_bool_to_mubi(range_perm[i].execute_access ));
101-
ral.range_perm[i].set(mubi4_bool_to_mubi(range_perm[i].write_access ));
102-
ral.range_perm[i].set(mubi4_bool_to_mubi(range_perm[i].read_access ));
103-
ral.range_perm[i].set(mubi4_bool_to_mubi(range_perm[i].enable ));
95+
foreach (dut_cfg.range_perm[i]) begin
96+
ral.range_perm[i].log_denied_access.set(mubi4_bool_to_mubi(
97+
dut_cfg.range_perm[i].log_denied_access));
98+
ral.range_perm[i].execute_access.set(mubi4_bool_to_mubi(dut_cfg.range_perm[i].execute_access));
99+
ral.range_perm[i].write_access.set(mubi4_bool_to_mubi(dut_cfg.range_perm[i].write_access));
100+
ral.range_perm[i].read_access.set(mubi4_bool_to_mubi(dut_cfg.range_perm[i].read_access));
101+
ral.range_perm[i].enable.set(mubi4_bool_to_mubi(dut_cfg.range_perm[i].enable));
104102
csr_update(.csr(ral.range_perm[i]));
105103
end
106104
endtask : cfg_range_perm
107105

108106
task ac_range_check_base_vseq::cfg_range_racl_policy();
109-
foreach (range_racl_policy[i]) begin
110-
ral.range_racl_policy_shadowed[i].set(range_racl_policy[i]);
107+
foreach (dut_cfg.range_racl_policy[i]) begin
108+
ral.range_racl_policy_shadowed[i].set(dut_cfg.range_racl_policy[i]);
111109
// Shadowed register: the 2 writes are automatically managed by the csr_utils_pkg
112110
csr_update(.csr(ral.range_racl_policy_shadowed[i]));
113111
end

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