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[earlgrey,dv] Remove bogus dmi device from TopEarlgrey
This was added for Darjeeling and it appears the engineers concerned didn't think about the fact this would convince various bits of tooling that the phantom interface exists for Earlgrey too. The bulk of this commit is tidying up the logic in topgen's lib.py, merge.py and top_uvm_reg.sv.tpl to allow the possibility that an instance of a block doesn't connect up all the interfaces that the block defines. To do this properly, it also fixes some incorrect type annotations in the code (which seem to have been introduced when first adding multiple address maps). The Earlgrey-specific change is tiny: it's just remove the "dmi" line in hw/top_earlgrey/data/top_earlgrey.hjson, together with the comment that shows the author realises it didn't make much sense... Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
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-109
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hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson

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Original file line numberDiff line numberDiff line change
@@ -2424,10 +2424,6 @@
24242424
{
24252425
hart: 0x40140000
24262426
}
2427-
dmi:
2428-
{
2429-
hart: 0x0
2430-
}
24312427
}
24322428
param_decl:
24332429
{

hw/top_earlgrey/data/autogen/top_earlgrey.secrets.testing.gen.hjson

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@@ -2873,10 +2873,6 @@
28732873
{
28742874
hart: 0x40140000
28752875
}
2876-
dmi:
2877-
{
2878-
hart: 0x0
2879-
}
28802876
}
28812877
memory: {}
28822878
param_list:

hw/top_earlgrey/data/top_earlgrey.hjson

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Original file line numberDiff line numberDiff line change
@@ -453,7 +453,6 @@
453453
reset_connections: {rst_ni: "lc_io_div4", rst_kmac_ni: "lc"},
454454
base_addrs: {
455455
regs: {hart: "0x40140000"},
456-
dmi: {hart: "0x0"}, // DMI is not used in EarlGrey
457456
},
458457
param_decl: {
459458
// NOTE THAT THIS IS A FEATURE FOR TEST CHIPS ONLY TO MITIGATE

hw/top_earlgrey/doc/memory_map.md

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,6 @@ The main address space, shared between the CPU and DM
2828
| otp_ctrl | core | `0x40130000` | `0x1000` | `0x400` | core device on otp_ctrl |
2929
| otp_macro | prim | `0x40138000` | `0x20` | `0x8` | prim device on otp_macro |
3030
| lc_ctrl | regs | `0x40140000` | `0x100` | `0x40` | regs device on lc_ctrl |
31-
| lc_ctrl | dmi | `0x0` | `0x1000` | `0x400` | dmi device on lc_ctrl |
3231
| alert_handler | default | `0x40150000` | `0x800` | `0x200` | alert_handler |
3332
| spi_host0 | default | `0x40300000` | `0x40` | `0x10` | spi_host0 |
3433
| spi_host1 | default | `0x40310000` | `0x40` | `0x10` | spi_host1 |

hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -149,16 +149,6 @@ package top_earlgrey_pkg;
149149
*/
150150
parameter int unsigned TOP_EARLGREY_LC_CTRL_REGS_SIZE_BYTES = 32'h100;
151151

152-
/**
153-
* Peripheral base address for dmi device on lc_ctrl in top earlgrey.
154-
*/
155-
parameter int unsigned TOP_EARLGREY_LC_CTRL_DMI_BASE_ADDR = 32'h0;
156-
157-
/**
158-
* Peripheral size in bytes for dmi device on lc_ctrl in top earlgrey.
159-
*/
160-
parameter int unsigned TOP_EARLGREY_LC_CTRL_DMI_SIZE_BYTES = 32'h1000;
161-
162152
/**
163153
* Peripheral base address for alert_handler in top earlgrey.
164154
*/

hw/top_earlgrey/sw/autogen/chip/top_earlgrey.rs

Lines changed: 0 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -217,20 +217,6 @@ pub const LC_CTRL_REGS_BASE_ADDR: usize = 0x40140000;
217217
/// `LC_CTRL_REGS_BASE_ADDR + LC_CTRL_REGS_SIZE_BYTES`.
218218
pub const LC_CTRL_REGS_SIZE_BYTES: usize = 0x100;
219219

220-
/// Peripheral base address for dmi device on lc_ctrl in top earlgrey.
221-
///
222-
/// This should be used with #mmio_region_from_addr to access the memory-mapped
223-
/// registers associated with the peripheral (usually via a DIF).
224-
pub const LC_CTRL_DMI_BASE_ADDR: usize = 0x0;
225-
226-
/// Peripheral size for dmi device on lc_ctrl in top earlgrey.
227-
///
228-
/// This is the size (in bytes) of the peripheral's reserved memory area. All
229-
/// memory-mapped registers associated with this peripheral should have an
230-
/// address between #LC_CTRL_DMI_BASE_ADDR and
231-
/// `LC_CTRL_DMI_BASE_ADDR + LC_CTRL_DMI_SIZE_BYTES`.
232-
pub const LC_CTRL_DMI_SIZE_BYTES: usize = 0x1000;
233-
234220
/// Peripheral base address for alert_handler in top earlgrey.
235221
///
236222
/// This should be used with #mmio_region_from_addr to access the memory-mapped

hw/top_earlgrey/sw/autogen/top_earlgrey.h

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Original file line numberDiff line numberDiff line change
@@ -282,24 +282,6 @@ extern "C" {
282282
*/
283283
#define TOP_EARLGREY_LC_CTRL_REGS_SIZE_BYTES 0x100u
284284

285-
/**
286-
* Peripheral base address for dmi device on lc_ctrl in top earlgrey.
287-
*
288-
* This should be used with #mmio_region_from_addr to access the memory-mapped
289-
* registers associated with the peripheral (usually via a DIF).
290-
*/
291-
#define TOP_EARLGREY_LC_CTRL_DMI_BASE_ADDR 0x0u
292-
293-
/**
294-
* Peripheral size for dmi device on lc_ctrl in top earlgrey.
295-
*
296-
* This is the size (in bytes) of the peripheral's reserved memory area. All
297-
* memory-mapped registers associated with this peripheral should have an
298-
* address between #TOP_EARLGREY_LC_CTRL_DMI_BASE_ADDR and
299-
* `TOP_EARLGREY_LC_CTRL_DMI_BASE_ADDR + TOP_EARLGREY_LC_CTRL_DMI_SIZE_BYTES`.
300-
*/
301-
#define TOP_EARLGREY_LC_CTRL_DMI_SIZE_BYTES 0x1000u
302-
303285
/**
304286
* Peripheral base address for alert_handler in top earlgrey.
305287
*

hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h

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Original file line numberDiff line numberDiff line change
@@ -304,23 +304,6 @@
304304
* `TOP_EARLGREY_LC_CTRL_REGS_BASE_ADDR + TOP_EARLGREY_LC_CTRL_REGS_SIZE_BYTES`.
305305
*/
306306
#define TOP_EARLGREY_LC_CTRL_REGS_SIZE_BYTES 0x100
307-
/**
308-
* Peripheral base address for dmi device on lc_ctrl in top earlgrey.
309-
*
310-
* This should be used with #mmio_region_from_addr to access the memory-mapped
311-
* registers associated with the peripheral (usually via a DIF).
312-
*/
313-
#define TOP_EARLGREY_LC_CTRL_DMI_BASE_ADDR 0x0
314-
315-
/**
316-
* Peripheral size for dmi device on lc_ctrl in top earlgrey.
317-
*
318-
* This is the size (in bytes) of the peripheral's reserved memory area. All
319-
* memory-mapped registers associated with this peripheral should have an
320-
* address between #TOP_EARLGREY_LC_CTRL_DMI_BASE_ADDR and
321-
* `TOP_EARLGREY_LC_CTRL_DMI_BASE_ADDR + TOP_EARLGREY_LC_CTRL_DMI_SIZE_BYTES`.
322-
*/
323-
#define TOP_EARLGREY_LC_CTRL_DMI_SIZE_BYTES 0x1000
324307
/**
325308
* Peripheral base address for alert_handler in top earlgrey.
326309
*

util/topgen.py

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -856,10 +856,12 @@ def generate_top_ral(topname: str, top: ConfigT, name_to_block: IpBlocksT,
856856

857857
inst_to_block[inst_name] = block_name
858858
for if_name in block.reg_blocks.keys():
859-
if_addr = {
860-
asid: int(addr, 0)
861-
for (asid, addr) in module["base_addrs"][if_name].items()
862-
}
859+
base_addrs = module["base_addrs"].get(if_name)
860+
if base_addrs is None:
861+
continue
862+
863+
if_addr = {asid: int(addr, 0)
864+
for (asid, addr) in base_addrs.items()}
863865
if_addrs[(inst_name, if_name)] = if_addr
864866

865867
# Top-level may override the mem setting. Store the new type to

util/topgen/lib.py

Lines changed: 67 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -721,11 +721,29 @@ def is_inst(module: ConfigT) -> bool:
721721
return top_level_mem or top_level_module
722722

723723

724-
def get_base_and_size(name_to_block: IpBlocksT, inst: ConfigT,
725-
ifname: Optional[str]) -> Tuple[int, int]:
724+
def get_base_and_size(block: IpBlock,
725+
inst: ConfigT,
726+
ifname: Optional[str]
727+
) -> Tuple[Dict[str, int], int] | None:
728+
'''Return (base_addrs, size) to describe addresses inst uses on ifname.
729+
730+
It may be that this instance doesn't actually use the interface at all in
731+
the top-level (perhaps because its support for the interface is disabled by
732+
a parameter). If so, return None.
733+
734+
If the instance *does* use the interface, base_addrs is a map from address
735+
space ID to the base address of the block in that address space.
736+
737+
size is the size in bytes that the block uses on the interface named
738+
ifname.
739+
'''
740+
741+
# Check whether the top-level connects up this interface. If not, return
742+
# None.
743+
base_addrs = inst['base_addrs'].get(ifname)
744+
if base_addrs is None:
745+
return None
726746

727-
block = name_to_block.get(inst['type'])
728-
assert block, f"No module named {inst['type']} (coming from instance {inst['name']})"
729747
# If inst is the instantiation of some block, find the register block
730748
# that corresponds to ifname
731749
if rb := block.reg_blocks.get(ifname):
@@ -739,7 +757,7 @@ def get_base_and_size(name_to_block: IpBlocksT, inst: ConfigT,
739757
'default' if ifname is None else repr(ifname),
740758
inst['name'], block.name))
741759

742-
base_addrs = deepcopy(inst['base_addrs'][ifname])
760+
base_addrs = deepcopy(base_addrs)
743761

744762
for (asid, base_addr) in base_addrs.items():
745763
if isinstance(base_addr, str):
@@ -981,19 +999,28 @@ def _init_device_regions(self, addr_space):
981999
for inst in self.top['module']:
9821000
block = self._name_to_block[inst['type']]
9831001
for if_name in block.reg_blocks.keys():
1002+
bases_size = get_base_and_size(block, inst, if_name)
1003+
if bases_size is None:
1004+
# Nothing to do for this interface: it is not used in this
1005+
# instance.
1006+
continue
1007+
1008+
bases, size = bases_size
1009+
base = bases.get(addr_space)
1010+
if base is None:
1011+
# Again, nothing to do for this interface: it does not
1012+
# define anything mapped into addr_space.
1013+
continue
1014+
9841015
full_if = (inst['name'], if_name)
9851016
full_if_name = Name.from_snake_case(full_if[0])
9861017
if if_name is not None:
9871018
full_if_name += Name.from_snake_case(if_name)
9881019

9891020
name = full_if_name
990-
base, size = get_base_and_size(self._name_to_block, inst,
991-
if_name)
992-
if addr_space not in base:
993-
continue
9941021

9951022
region = MemoryRegion(self._top_name, name, addr_space,
996-
base[addr_space], size)
1023+
base, size)
9971024
device_region[inst['name']].update({if_name: region})
9981025

9991026
self.device_regions[addr_space] = device_region
@@ -1039,19 +1066,36 @@ def _init_device_memories(self, addr_space):
10391066
device_memories = defaultdict(dict)
10401067

10411068
for inst in self.top['module']:
1042-
if "memory" in inst:
1043-
for if_name, val in inst["memory"].items():
1044-
base, size = get_base_and_size(self._name_to_block, inst,
1045-
if_name)
1046-
if addr_space not in base:
1047-
continue
1048-
1049-
full_if_name = Name.from_snake_case(inst['name']) + \
1050-
Name.from_snake_case(if_name)
1051-
region = MemoryRegion(self._top_name, full_if_name, addr_space,
1052-
base[addr_space], size)
1053-
1054-
device_memories[inst['name']].update({if_name: region})
1069+
block = self._name_to_block.get(inst['type'])
1070+
if block is None:
1071+
raise RuntimeError(f"No block defined for instance "
1072+
f"type {inst['type']} (with name "
1073+
f"{inst['name']})")
1074+
1075+
for if_name, val in inst.get("memory", {}).items():
1076+
bases_size = get_base_and_size(block, inst, if_name)
1077+
1078+
# We expect bases_size not to be None. If it is None, then the
1079+
# instance defines the memory but doesn't give it a base
1080+
# address (which seems unlikely to be right).
1081+
if bases_size is None:
1082+
raise RuntimeError(f"The instance named {inst['name']} "
1083+
f"defines a memory for interface "
1084+
f"{if_name}, but doesn't give it a "
1085+
f"base address.")
1086+
1087+
bases, size = bases_size
1088+
base = bases.get(addr_space)
1089+
1090+
if base is None:
1091+
continue
1092+
1093+
full_if_name = Name.from_snake_case(inst['name']) + \
1094+
Name.from_snake_case(if_name)
1095+
region = MemoryRegion(self._top_name, full_if_name, addr_space,
1096+
base, size)
1097+
1098+
device_memories[inst['name']].update({if_name: region})
10551099

10561100
self.device_memories[addr_space] = device_memories
10571101

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