[qemu,ottf] SPI console with TX indicator relies on CSB status #28735
Description
Description
A dependency of #27932. Provisioning flows use the SPI consoles with a TX-ready GPIO indicator pin, but this introduces logic on the device side for synchronizing with the host where SW directly polls the CSb status of the spi_device (STATUS.csb).
This is problematic in QEMU where these CSb signals can be missed because the IO thread does not yield to the vCPU frequently enough if there is enough data available over SPI from the host, meaning that CS can be asserted and deasserted without SPI IO yielding to the vCPU to poll for the CSb status. This means that the SPI console does not work in QEMU environments when used with a GPIO TX indicator.
It should be possible to rewrite this SPI console logic to instead use the LAST_READ_ADDR register to determine when the host has finished reading, since we know the exact amount of data to be read out ahead of time. The console should probably be changed to use this instead.