[qemu] SPI Device fixes for provisioning

[AlexJones0]

Description

A dependency of #27932.

Currently, QEMU's SPI device has a few issues that have been found as part of the effort to run provisioning flows in QEMU:

1. The CSb state is incorrectly reported in the STATUS register.
2. The LAST_READ_ADDR register is incorrectly writable.
3. For large SPI reads that cross the buffer boundary (a flipbuf event) the pacing delay to allow guest SW to handle the buffer switch is too large and with a default icount shift of 6 causes a > 1 second latency between transmission and reception of data over the SPI CharDev. As this delay is arbitrary and likely doesn't need to be set this high, reduce this delay (and probably also increase the SPI timeout in QEMU for good measure, to be able to handle such cases).

[AlexJones0]

Will be addressed on the QEMU side by lowRISC/qemu#291.

[AlexJones0]

There's also a couple of SPI device changes on the OpenTitanLib side in #28744 that were encountered whilst investigating the provisioning flows. The timeout increase in particular will help address point 3, even if the delay is unchanged on QEMU.