[ot] hw/opentitan: add a generic API for OTP implementation

This commit is the first step to support platform-specific OTP implementations

Signed-off-by: Emmanuel Blot <[email protected]>

Author: rivos-eblot

hw/opentitan/Kconfig

@@ -47,6 +47,10 @@ config OT_OTBN
 config OT_OTP
     bool
 
+config OT_OTP_EARLGREY
+    select OT_OTP
+    bool
+
 config OT_PINMUX
     bool
 

hw/opentitan/meson.build

@@ -19,6 +19,7 @@ softmmu_ss.add(when: 'CONFIG_OT_KMAC', if_true: [files('ot_kmac.c'), libtomcrypt
 softmmu_ss.add(when: 'CONFIG_OT_LIFECYCLE', if_true: files('ot_lifecycle.c'))
 softmmu_ss.add(when: 'CONFIG_OT_OTBN', if_true: files('ot_otbn.c'))
 softmmu_ss.add(when: 'CONFIG_OT_OTP', if_true: files('ot_otp.c'))
+softmmu_ss.add(when: 'CONFIG_OT_OTP_EARLGREY', if_true: files('ot_otp_earlgrey.c'))
 softmmu_ss.add(when: 'CONFIG_OT_PINMUX', if_true: files('ot_pinmux.c'))
 softmmu_ss.add(when: 'CONFIG_OT_PRNG', if_true: files('ot_prng.c'))
 softmmu_ss.add(when: 'CONFIG_OT_PWRMGR', if_true: files('ot_pwrmgr.c'))

hw/opentitan/ot_csrng.c

@@ -1645,8 +1645,9 @@ static void ot_csrng_regs_write(void *opaque, hwaddr addr, uint64_t val64,
             if (change) {
                 xtrace_ot_csrng_info("handling CTRL change", val32);
                 ot_csrng_handle_enable(s);
-                const OtOTPHWCfg *hw_cfg;
-                hw_cfg = ot_otp_ctrl_get_hw_cfg(s->otp_ctrl);
+                OtOTPStateClass *oc =
+                    OBJECT_GET_CLASS(OtOTPStateClass, s->otp_ctrl, TYPE_OT_OTP);
+                const OtOTPHWCfg *hw_cfg = oc->get_hw_cfg(s->otp_ctrl);
                 if (hw_cfg->en_csrng_sw_app_read == OT_MULTIBITBOOL8_TRUE) {
                     uint32_t sw_app_en = FIELD_EX32(val32, CTRL, SW_APP_ENABLE);
                     s->sw_app_granted = sw_app_en == OT_MULTIBITBOOL4_TRUE;

hw/opentitan/ot_entropy_src.c

@@ -1575,8 +1575,9 @@ static void ot_entropy_src_reset(DeviceState *dev)
         ibex_irq_set(&s->alerts[ix], 0);
     }
 
-    const OtOTPHWCfg *hw_cfg;
-    hw_cfg = ot_otp_ctrl_get_hw_cfg(s->otp_ctrl);
+    OtOTPStateClass *oc =
+        OBJECT_GET_CLASS(OtOTPStateClass, s->otp_ctrl, TYPE_OT_OTP);
+    const OtOTPHWCfg *hw_cfg = oc->get_hw_cfg(s->otp_ctrl);
 
     s->obs_fifo_en = false;
     s->otp_fw_read = hw_cfg->en_entropy_src_fw_read == OT_MULTIBITBOOL8_TRUE;

hw/opentitan/ot_lifecycle.c

@@ -249,7 +249,9 @@ static uint32_t ot_lifecycle_get_lc_state(OtLifeCycleState *s)
     uint32_t lc_state;
 
     if (s->otp_ctrl) {
-        ot_otp_ctrl_get_lc_info(s->otp_ctrl, &lc_state, NULL);
+        OtOTPStateClass *oc =
+            OBJECT_GET_CLASS(OtOTPStateClass, s->otp_ctrl, TYPE_OT_OTP);
+        oc->get_lc_info(s->otp_ctrl, &lc_state, NULL);
     } else {
         qemu_log_mask(LOG_GUEST_ERROR, "OTP controller not connected\n");
         lc_state = LC_STATE_INVALID;
@@ -263,7 +265,9 @@ static uint32_t ot_lifecycle_get_lc_transition_count(OtLifeCycleState *s)
     uint32_t lc_tcount;
 
     if (s->otp_ctrl) {
-        ot_otp_ctrl_get_lc_info(s->otp_ctrl, NULL, &lc_tcount);
+        OtOTPStateClass *oc =
+            OBJECT_GET_CLASS(OtOTPStateClass, s->otp_ctrl, TYPE_OT_OTP);
+        oc->get_lc_info(s->otp_ctrl, NULL, &lc_tcount);
     } else {
         qemu_log_mask(LOG_GUEST_ERROR, "OTP controller not connected\n");
         lc_tcount = LC_TRANSITION_COUNT_MAX + 1u;