@@ -220,6 +220,7 @@ struct OtAlertState {
220220 MemoryRegion mmio ;
221221 IbexIRQ * irqs ;
222222 IbexIRQ * esc_txs ;
223+ IbexIRQ nmi_alert ;
223224 OtAlertScheduler * schedulers ;
224225
225226 OtAlertRegs regs ; /* not ordered by register index */
@@ -571,6 +572,7 @@ static void ot_alert_clear_alert(OtAlertState *s, unsigned nclass)
571572 trace_ot_alert_escalation (s -> ot_id , ACLASS (nclass ), ix , "release" );
572573 }
573574 ibex_irq_set (esc_tx , 0 );
575+ ibex_irq_set (& s -> nmi_alert , 0u );
574576 }
575577 /*
576578 * "Software can clear CLASSn_ACCUM_CNT with a write to CLASSA_CLR_SHADOWED"
@@ -741,6 +743,10 @@ static void ot_alert_signal_tx(void *opaque, int n, int level)
741743
742744 trace_ot_alert_signal_tx (s -> ot_id , alert , (bool )level , alert_en );
743745
746+ if (alert_en && level ) {
747+ ibex_irq_set (& s -> nmi_alert , 1u );
748+ }
749+
744750 if (!alert_en || !level ) {
745751 /* releasing the alert does not clear it */
746752 return ;
@@ -1034,6 +1040,7 @@ static void ot_alert_realize(DeviceState *dev, Error **errp)
10341040 s -> esc_txs = g_new0 (IbexIRQ , PARAM_N_ESC_SEV );
10351041 ibex_qdev_init_irqs (OBJECT (dev ), s -> esc_txs , OT_ALERT_ESCALATE ,
10361042 PARAM_N_ESC_SEV );
1043+ ibex_qdev_init_irq (OBJECT (dev ), & s -> nmi_alert , OT_ALERT_NMI );
10371044
10381045 qdev_init_gpio_in_named (dev , & ot_alert_signal_tx , OT_DEVICE_ALERT ,
10391046 s -> n_alerts );
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