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AlexJones0jwnrt
AlexJones0
authored and
jwnrt
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[ot] hw/riscv: ot_earlgrey: Connect device alerts to alert handler
Connect the alerts for each of the OpenTitan Earlgrey devices to the alert handler. This is based on the mappings found in the autogenerated `hw/top_earlgrey/sw/autogen/top_earlgrey.h` file for the Earlgrey top found in the OpenTitan repository. Signed-off-by: Alex Jones <[email protected]>
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‎hw/riscv/ot_earlgrey.c‎

Lines changed: 102 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,7 @@
22
* QEMU RISC-V Board Compatible with OpenTitan EarlGrey FPGA platform
33
*
44
* Copyright (c) 2022-2024 Rivos, Inc.
5+
* Copyright (c) 2024-2025 lowRISC contributors.
56
*
67
* Author(s):
78
* Emmanuel Blot <[email protected]>
@@ -212,6 +213,14 @@ static const uint32_t ot_eg_pmp_addrs[] = {
212213
#define OT_EG_SOC_GPIO_SYSBUS_IRQ(_irq_, _target_, _num_) \
213214
IBEX_GPIO_SYSBUS_IRQ(_irq_, OT_EG_SOC_DEV_##_target_, _num_)
214215

216+
#define OT_EG_SOC_GPIO_ALERT(_snum_, _tnum_) \
217+
OT_EG_SOC_SIGNAL(OT_DEVICE_ALERT, _snum_, ALERT_HANDLER, OT_DEVICE_ALERT, \
218+
_tnum_)
219+
220+
#define OT_EG_SOC_GPIO_ESCALATE(_snum_, _tgt_, _tnum_) \
221+
OT_EG_SOC_SIGNAL(OT_ALERT_ESCALATE, _snum_, _tgt_, OT_ALERT_ESCALATE, \
222+
_tnum_)
223+
215224
#define OT_EG_SOC_DEVLINK(_pname_, _target_) \
216225
IBEX_DEVLINK(_pname_, OT_EG_SOC_DEV_##_target_)
217226

@@ -340,7 +349,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
340349
OT_EG_SOC_GPIO_SYSBUS_IRQ(5, PLIC, 6),
341350
OT_EG_SOC_GPIO_SYSBUS_IRQ(6, PLIC, 7),
342351
OT_EG_SOC_GPIO_SYSBUS_IRQ(7, PLIC, 8),
343-
OT_EG_SOC_GPIO_SYSBUS_IRQ(8, PLIC, 9)
352+
OT_EG_SOC_GPIO_SYSBUS_IRQ(8, PLIC, 9),
353+
OT_EG_SOC_GPIO_ALERT(0, 0)
344354
),
345355
.prop = IBEXDEVICEPROPDEFS(
346356
IBEX_DEV_UINT_PROP("pclk", OT_EG_PERIPHERAL_CLK_HZ)
@@ -362,7 +372,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
362372
OT_EG_SOC_GPIO_SYSBUS_IRQ(5, PLIC, 15),
363373
OT_EG_SOC_GPIO_SYSBUS_IRQ(6, PLIC, 16),
364374
OT_EG_SOC_GPIO_SYSBUS_IRQ(7, PLIC, 17),
365-
OT_EG_SOC_GPIO_SYSBUS_IRQ(8, PLIC, 18)
375+
OT_EG_SOC_GPIO_SYSBUS_IRQ(8, PLIC, 18),
376+
OT_EG_SOC_GPIO_ALERT(0, 1)
366377
),
367378
.prop = IBEXDEVICEPROPDEFS(
368379
IBEX_DEV_UINT_PROP("pclk", OT_EG_PERIPHERAL_CLK_HZ)
@@ -384,7 +395,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
384395
OT_EG_SOC_GPIO_SYSBUS_IRQ(5, PLIC, 24),
385396
OT_EG_SOC_GPIO_SYSBUS_IRQ(6, PLIC, 25),
386397
OT_EG_SOC_GPIO_SYSBUS_IRQ(7, PLIC, 26),
387-
OT_EG_SOC_GPIO_SYSBUS_IRQ(8, PLIC, 27)
398+
OT_EG_SOC_GPIO_SYSBUS_IRQ(8, PLIC, 27),
399+
OT_EG_SOC_GPIO_ALERT(0, 2)
388400
),
389401
.prop = IBEXDEVICEPROPDEFS(
390402
IBEX_DEV_UINT_PROP("pclk", OT_EG_PERIPHERAL_CLK_HZ)
@@ -406,7 +418,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
406418
OT_EG_SOC_GPIO_SYSBUS_IRQ(5, PLIC, 33),
407419
OT_EG_SOC_GPIO_SYSBUS_IRQ(6, PLIC, 34),
408420
OT_EG_SOC_GPIO_SYSBUS_IRQ(7, PLIC, 35),
409-
OT_EG_SOC_GPIO_SYSBUS_IRQ(8, PLIC, 36)
421+
OT_EG_SOC_GPIO_SYSBUS_IRQ(8, PLIC, 36),
422+
OT_EG_SOC_GPIO_ALERT(0, 3)
410423
),
411424
.prop = IBEXDEVICEPROPDEFS(
412425
IBEX_DEV_UINT_PROP("pclk", OT_EG_PERIPHERAL_CLK_HZ)
@@ -449,7 +462,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
449462
OT_EG_SOC_GPIO_SYSBUS_IRQ(28, PLIC, 65),
450463
OT_EG_SOC_GPIO_SYSBUS_IRQ(29, PLIC, 66),
451464
OT_EG_SOC_GPIO_SYSBUS_IRQ(30, PLIC, 67),
452-
OT_EG_SOC_GPIO_SYSBUS_IRQ(31, PLIC, 68)
465+
OT_EG_SOC_GPIO_SYSBUS_IRQ(31, PLIC, 68),
466+
OT_EG_SOC_GPIO_ALERT(0, 4)
453467
)
454468
},
455469
[OT_EG_SOC_DEV_SPI_DEVICE] = {
@@ -466,7 +480,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
466480
OT_EG_SOC_GPIO_SYSBUS_IRQ(4, PLIC, 73),
467481
OT_EG_SOC_GPIO_SYSBUS_IRQ(5, PLIC, 74),
468482
OT_EG_SOC_GPIO_SYSBUS_IRQ(6, PLIC, 75),
469-
OT_EG_SOC_GPIO_SYSBUS_IRQ(7, PLIC, 76)
483+
OT_EG_SOC_GPIO_SYSBUS_IRQ(7, PLIC, 76),
484+
OT_EG_SOC_GPIO_ALERT(0, 5)
470485
),
471486
},
472487
[OT_EG_SOC_DEV_I2C0] = {
@@ -520,7 +535,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
520535
),
521536
.gpio = IBEXGPIOCONNDEFS(
522537
OT_EG_SOC_GPIO(0, HART, IRQ_M_TIMER),
523-
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 124)
538+
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 124),
539+
OT_EG_SOC_GPIO_ALERT(0, 10)
524540
),
525541
.prop = IBEXDEVICEPROPDEFS(
526542
IBEX_DEV_UINT_PROP("pclk", OT_EG_PERIPHERAL_CLK_HZ)
@@ -534,7 +550,12 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
534550
),
535551
.gpio = IBEXGPIOCONNDEFS(
536552
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 125),
537-
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 126)
553+
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 126),
554+
OT_EG_SOC_GPIO_ALERT(0, 11),
555+
OT_EG_SOC_GPIO_ALERT(1, 12),
556+
OT_EG_SOC_GPIO_ALERT(2, 13),
557+
OT_EG_SOC_GPIO_ALERT(3, 14),
558+
OT_EG_SOC_GPIO_ALERT(4, 15)
538559
),
539560
.link = IBEXDEVICELINKDEFS(
540561
OT_EG_SOC_DEVLINK("edn", EDN0),
@@ -573,7 +594,10 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
573594
{ .base = 0x40140000u }
574595
),
575596
.gpio = IBEXGPIOCONNDEFS(
576-
OT_EG_SOC_RSP(OT_PWRMGR_LC, PWRMGR)
597+
OT_EG_SOC_RSP(OT_PWRMGR_LC, PWRMGR),
598+
OT_EG_SOC_GPIO_ALERT(0, 16),
599+
OT_EG_SOC_GPIO_ALERT(1, 17),
600+
OT_EG_SOC_GPIO_ALERT(2, 18)
577601
),
578602
.link = IBEXDEVICELINKDEFS(
579603
OT_EG_SOC_DEVLINK("otp_ctrl", OTP_CTRL),
@@ -633,7 +657,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
633657
),
634658
.gpio = IBEXGPIOCONNDEFS(
635659
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 131),
636-
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 132)
660+
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 132),
661+
OT_EG_SOC_GPIO_ALERT(0, 19)
637662
),
638663
.prop = IBEXDEVICEPROPDEFS(
639664
IBEX_DEV_UINT_PROP("bus-num", 0)
@@ -646,7 +671,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
646671
),
647672
.gpio = IBEXGPIOCONNDEFS(
648673
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 133),
649-
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 134)
674+
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 134),
675+
OT_EG_SOC_GPIO_ALERT(0, 20)
650676
),
651677
.prop = IBEXDEVICEPROPDEFS(
652678
IBEX_DEV_UINT_PROP("bus-num", 1)
@@ -678,7 +704,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
678704
OT_IBEX_WRAPPER_CPU_EN,
679705
OT_IBEX_PWRMGR_CPU_EN),
680706
OT_EG_SOC_SIGNAL(OT_PWRMGR_RST_REQ, 0, RSTMGR,
681-
OT_RSTMGR_RST_REQ, 0)
707+
OT_RSTMGR_RST_REQ, 0),
708+
OT_EG_SOC_GPIO_ALERT(0, 22)
682709
),
683710
.prop = IBEXDEVICEPROPDEFS(
684711
IBEX_DEV_UINT_PROP("num-rom", 1u),
@@ -692,14 +719,20 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
692719
),
693720
.gpio = IBEXGPIOCONNDEFS(
694721
OT_EG_SOC_SIGNAL(OT_RSTMGR_SW_RST, 0, PWRMGR, \
695-
OT_PWRMGR_SW_RST, 0)
722+
OT_PWRMGR_SW_RST, 0),
723+
OT_EG_SOC_GPIO_ALERT(0, 23),
724+
OT_EG_SOC_GPIO_ALERT(1, 24)
696725
),
697726
},
698727
[OT_EG_SOC_DEV_CLKMGR] = {
699728
.type = TYPE_OT_CLKMGR,
700729
.memmap = MEMMAPENTRIES(
701730
{ .base = 0x40420000u }
702731
),
732+
.gpio = IBEXGPIOCONNDEFS(
733+
OT_EG_SOC_GPIO_ALERT(0, 25),
734+
OT_EG_SOC_GPIO_ALERT(1, 26)
735+
)
703736
},
704737
[OT_EG_SOC_DEV_SYSRST_CTRL] = {
705738
.type = TYPE_UNIMPLEMENTED_DEVICE,
@@ -739,6 +772,9 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
739772
.memmap = MEMMAPENTRIES(
740773
{ .base = 0x40460000u }
741774
),
775+
.gpio = IBEXGPIOCONNDEFS(
776+
OT_EG_SOC_GPIO_ALERT(0, 30)
777+
)
742778
},
743779
[OT_EG_SOC_DEV_AON_TIMER] = {
744780
.type = TYPE_OT_AON_TIMER,
@@ -751,7 +787,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
751787
OT_EG_SOC_SIGNAL(OT_AON_TIMER_WKUP, 0, PWRMGR, \
752788
OT_PWRMGR_WKUP, OT_PWRMGR_WAKEUP_AON_TIMER),
753789
OT_EG_SOC_SIGNAL(OT_AON_TIMER_BITE, 0, PWRMGR, \
754-
OT_PWRMGR_RST, OT_EG_RESET_AON_TIMER)
790+
OT_PWRMGR_RST, OT_EG_RESET_AON_TIMER),
791+
OT_EG_SOC_GPIO_ALERT(0, 31)
755792
),
756793
.prop = IBEXDEVICEPROPDEFS(
757794
IBEX_DEV_UINT_PROP("pclk", OT_EG_AON_CLK_HZ)
@@ -768,13 +805,20 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
768805
.memmap = MEMMAPENTRIES(
769806
{ .base = 0x40490000u }
770807
),
808+
.gpio = IBEXGPIOCONNDEFS(
809+
OT_EG_SOC_GPIO_ALERT(0, 32),
810+
OT_EG_SOC_GPIO_ALERT(1, 33)
811+
)
771812
},
772813
[OT_EG_SOC_DEV_SRAM_RET_CTRL] = {
773814
.type = TYPE_OT_SRAM_CTRL,
774815
.memmap = MEMMAPENTRIES(
775816
{ .base = 0x40500000u },
776817
{ .base = 0x40600000u }
777818
),
819+
.gpio = IBEXGPIOCONNDEFS(
820+
OT_EG_SOC_GPIO_ALERT(0, 34)
821+
),
778822
.link = IBEXDEVICELINKDEFS(
779823
OT_EG_SOC_DEVLINK("otp_ctrl", OTP_CTRL)
780824
),
@@ -797,7 +841,12 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
797841
OT_EG_SOC_GPIO_SYSBUS_IRQ(2, PLIC, 162),
798842
OT_EG_SOC_GPIO_SYSBUS_IRQ(3, PLIC, 163),
799843
OT_EG_SOC_GPIO_SYSBUS_IRQ(4, PLIC, 164),
800-
OT_EG_SOC_GPIO_SYSBUS_IRQ(5, PLIC, 165)
844+
OT_EG_SOC_GPIO_SYSBUS_IRQ(5, PLIC, 165),
845+
OT_EG_SOC_GPIO_ALERT(0, 35),
846+
OT_EG_SOC_GPIO_ALERT(1, 36),
847+
OT_EG_SOC_GPIO_ALERT(2, 37),
848+
OT_EG_SOC_GPIO_ALERT(3, 38),
849+
OT_EG_SOC_GPIO_ALERT(4, 39)
801850
),
802851
},
803852
[OT_EG_SOC_DEV_AES] = {
@@ -806,7 +855,9 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
806855
{ .base = 0x41100000u }
807856
),
808857
.gpio = IBEXGPIOCONNDEFS(
809-
OT_EG_SOC_CLKMGR_HINT(OT_CLKMGR_HINT_AES)
858+
OT_EG_SOC_CLKMGR_HINT(OT_CLKMGR_HINT_AES),
859+
OT_EG_SOC_GPIO_ALERT(0, 42),
860+
OT_EG_SOC_GPIO_ALERT(1, 43)
810861
),
811862
.link = IBEXDEVICELINKDEFS(
812863
OT_EG_SOC_DEVLINK("edn", EDN0)
@@ -824,7 +875,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
824875
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 166),
825876
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 167),
826877
OT_EG_SOC_GPIO_SYSBUS_IRQ(2, PLIC, 168),
827-
OT_EG_SOC_CLKMGR_HINT(OT_CLKMGR_HINT_HMAC)
878+
OT_EG_SOC_CLKMGR_HINT(OT_CLKMGR_HINT_HMAC),
879+
OT_EG_SOC_GPIO_ALERT(0, 44)
828880
),
829881
},
830882
[OT_EG_SOC_DEV_KMAC] = {
@@ -835,7 +887,9 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
835887
.gpio = IBEXGPIOCONNDEFS(
836888
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 169),
837889
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 170),
838-
OT_EG_SOC_GPIO_SYSBUS_IRQ(2, PLIC, 171)
890+
OT_EG_SOC_GPIO_SYSBUS_IRQ(2, PLIC, 171),
891+
OT_EG_SOC_GPIO_ALERT(0, 45),
892+
OT_EG_SOC_GPIO_ALERT(1, 46)
839893
),
840894
.link = IBEXDEVICELINKDEFS(
841895
OT_EG_SOC_DEVLINK("edn", EDN0)
@@ -852,7 +906,9 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
852906
),
853907
.gpio = IBEXGPIOCONNDEFS(
854908
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 172),
855-
OT_EG_SOC_CLKMGR_HINT(OT_CLKMGR_HINT_OTBN)
909+
OT_EG_SOC_CLKMGR_HINT(OT_CLKMGR_HINT_OTBN),
910+
OT_EG_SOC_GPIO_ALERT(0, 47),
911+
OT_EG_SOC_GPIO_ALERT(1, 48)
856912
),
857913
.link = IBEXDEVICELINKDEFS(
858914
OT_EG_SOC_DEVLINK("edn-u", EDN0),
@@ -884,7 +940,9 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
884940
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 174),
885941
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 175),
886942
OT_EG_SOC_GPIO_SYSBUS_IRQ(2, PLIC, 176),
887-
OT_EG_SOC_GPIO_SYSBUS_IRQ(3, PLIC, 177)
943+
OT_EG_SOC_GPIO_SYSBUS_IRQ(3, PLIC, 177),
944+
OT_EG_SOC_GPIO_ALERT(0, 51),
945+
OT_EG_SOC_GPIO_ALERT(1, 52)
888946
),
889947
.link = IBEXDEVICELINKDEFS(
890948
OT_EG_SOC_DEVLINK("random_src", ENTROPY_SRC),
@@ -900,7 +958,9 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
900958
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 178),
901959
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 179),
902960
OT_EG_SOC_GPIO_SYSBUS_IRQ(2, PLIC, 180),
903-
OT_EG_SOC_GPIO_SYSBUS_IRQ(3, PLIC, 181)
961+
OT_EG_SOC_GPIO_SYSBUS_IRQ(3, PLIC, 181),
962+
OT_EG_SOC_GPIO_ALERT(0, 53),
963+
OT_EG_SOC_GPIO_ALERT(1, 54)
904964
),
905965
.link = IBEXDEVICELINKDEFS(
906966
OT_EG_SOC_DEVLINK("ast", AST),
@@ -914,7 +974,9 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
914974
),
915975
.gpio = IBEXGPIOCONNDEFS(
916976
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 182),
917-
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 183)
977+
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 183),
978+
OT_EG_SOC_GPIO_ALERT(0, 55),
979+
OT_EG_SOC_GPIO_ALERT(1, 56)
918980
),
919981
.link = IBEXDEVICELINKDEFS(
920982
OT_EG_SOC_DEVLINK("csrng", CSRNG)
@@ -930,7 +992,9 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
930992
),
931993
.gpio = IBEXGPIOCONNDEFS(
932994
OT_EG_SOC_GPIO_SYSBUS_IRQ(0, PLIC, 184),
933-
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 185)
995+
OT_EG_SOC_GPIO_SYSBUS_IRQ(1, PLIC, 185),
996+
OT_EG_SOC_GPIO_ALERT(0, 57),
997+
OT_EG_SOC_GPIO_ALERT(1, 58)
934998
),
935999
.link = IBEXDEVICELINKDEFS(
9361000
OT_EG_SOC_DEVLINK("csrng", CSRNG)
@@ -945,6 +1009,9 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
9451009
{ .base = 0x411c0000u },
9461010
{ .base = 0x10000000u }
9471011
),
1012+
.gpio = IBEXGPIOCONNDEFS(
1013+
OT_EG_SOC_GPIO_ALERT(0, 59)
1014+
),
9481015
.link = IBEXDEVICELINKDEFS(
9491016
OT_EG_SOC_DEVLINK("otp_ctrl", OTP_CTRL)
9501017
),
@@ -964,7 +1031,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
9641031
OT_EG_SOC_SIGNAL(OT_ROM_CTRL_GOOD, 0, PWRMGR, \
9651032
OT_PWRMGR_ROM_GOOD, 0),
9661033
OT_EG_SOC_SIGNAL(OT_ROM_CTRL_DONE, 0, PWRMGR, \
967-
OT_PWRMGR_ROM_DONE, 0)
1034+
OT_PWRMGR_ROM_DONE, 0),
1035+
OT_EG_SOC_GPIO_ALERT(0, 60)
9681036
),
9691037
.link = IBEXDEVICELINKDEFS(
9701038
OT_EG_SOC_DEVLINK("kmac", KMAC)
@@ -983,6 +1051,12 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
9831051
.memmap = MEMMAPENTRIES(
9841052
{ .base = 0x411f0000u }
9851053
),
1054+
.gpio = IBEXGPIOCONNDEFS(
1055+
OT_EG_SOC_GPIO_ALERT(0, 61),
1056+
OT_EG_SOC_GPIO_ALERT(1, 62),
1057+
OT_EG_SOC_GPIO_ALERT(2, 63),
1058+
OT_EG_SOC_GPIO_ALERT(3, 64)
1059+
),
9861060
.link = IBEXDEVICELINKDEFS(
9871061
OT_EG_SOC_DEVLINK("edn", EDN0)
9881062
),
@@ -1000,7 +1074,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
10001074
OT_EG_SOC_DM_CONNECTION(OT_EG_SOC_DEV_DM, 0),
10011075
OT_EG_SOC_DM_CONNECTION(OT_EG_SOC_DEV_DM, 1),
10021076
OT_EG_SOC_DM_CONNECTION(OT_EG_SOC_DEV_DM, 2),
1003-
OT_EG_SOC_DM_CONNECTION(OT_EG_SOC_DEV_DM, 3)
1077+
OT_EG_SOC_DM_CONNECTION(OT_EG_SOC_DEV_DM, 3),
1078+
OT_EG_SOC_GPIO_ALERT(0, 40)
10041079
),
10051080
},
10061081
[OT_EG_SOC_DEV_PLIC] = {
@@ -1032,7 +1107,8 @@ static const IbexDeviceDef ot_eg_soc_devices[] = {
10321107
{ .base = 0x2c000000u }
10331108
),
10341109
.gpio = IBEXGPIOCONNDEFS(
1035-
OT_EG_SOC_GPIO(0, HART, IRQ_M_SOFT)
1110+
OT_EG_SOC_GPIO(0, HART, IRQ_M_SOFT),
1111+
OT_EG_SOC_GPIO_ALERT(0, 41)
10361112
),
10371113
},
10381114
/* clang-format on */

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