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[ot] tests/opentitan: earlgrey-tests: Add common flaky tests
Add a couple more OpenTitan tests that are commonly seen as being flaky in the logs (previously were not expected to pass). Signed-off-by: Alex Jones <[email protected]>
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tests/opentitan/data/earlgrey-tests.txt

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@@ -270,6 +270,8 @@ pass: //sw/device/tests:pwrmgr_sleep_disabled_test_sim_qemu_rom_with_fake_keys
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pass: //sw/device/tests:pwrmgr_sleep_disabled_test_sim_qemu_sival_rom_ext
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pass: //sw/device/tests:pwrmgr_wdog_reset_reqs_test_sim_qemu_rom_with_fake_keys
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pass: //sw/device/tests:pwrmgr_wdog_reset_reqs_test_sim_qemu_sival_rom_ext
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flaky: //sw/device/tests/qemu:i2c_qemu_target_device_test_sim_qemu_rom_with_fake_keys # Fails occassionally when running in parallel on a slow host, may be a timing issue.
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flaky: //sw/device/tests/qemu:i2c_qemu_target_device_test_sim_qemu_sival_rom_ext # Fails occassionally when running in parallel on a slow host, may be a timing issue.
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flaky: //sw/device/tests/qemu:i2c_qemu_test_sim_qemu_rom_with_fake_keys # Fails ~10% of the time when running in parallel. Root cause unknown.
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pass: //sw/device/tests:rom_exit_immediately_sim_qemu_base
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pass: //sw/device/tests:rstmgr_smoketest_sim_qemu_rom_with_fake_keys
@@ -278,6 +280,8 @@ pass: //sw/device/tests:rstmgr_sw_req_test_sim_qemu_rom_with_fake_keys
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pass: //sw/device/tests:rstmgr_sw_req_test_sim_qemu_sival_rom_ext
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pass: //sw/device/tests:rv_core_ibex_mem_test_prod_sim_qemu_rom_with_fake_keys
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pass: //sw/device/tests:rv_core_ibex_mem_test_prod_sim_qemu_sival_rom_ext
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flaky: //sw/device/tests:rv_core_ibex_rnd_test_sim_qemu_rom_with_fake_keys # Passes and fails randomly, likely due to the test using randomness.
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flaky: //sw/device/tests:rv_core_ibex_rnd_test_sim_qemu_sival_rom_ext # Passes and fails randomly, likely due to the test using randomness.
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pass: //sw/device/tests:rv_timer_smoketest_sim_qemu_rom_with_fake_keys
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pass: //sw/device/tests:rv_timer_smoketest_sim_qemu_sival_rom_ext
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pass: //sw/device/tests:spi_device_flash_smoketest_sim_qemu_rom_with_fake_keys

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