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Description
This issue was originally opened to track missing functionality in ot_i2c_host_proxy, but is now expanded to deficiencies in the whole I2C system.
The QEMU I2C system has several issues for our I2C implementation:
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QEMU I2C does not allow us to defer any I2C operation processing. This is a reasonable implementation decision for the simple I2C devices modelled by QEMU, but it makes implementing features such as clock stretching impossible. It also means that for devices that are not simple state machines, such as
ot-i2cwhich needs driving by Ibex software, it is possible that entire transactions may occur without being observable to Ibex. -
The workaround for this is to use a short "stall" timer to gate processing of bytes by
ot-i2c_host_proxy, to yield to Ibex to continue and observe the ongoing transaction (receive and process the IRQ, fill the TX FIFO in OT I2C, etc.). Is there a different way to yield execution from the IO thread? -
The implementation of I2C transfers in QEMU does not explicitly support multiple masters/controllers on the same bus, and the code does not track who is currently controlling the bus. As both
ot-i2chost mode andot-i2c_host_proxyare controllers (in that they initiate I2C transfers), it is possible that both could attempt to perform a transaction at the same time, or one may attempt to end a transfer that the other is partaking in, in which case the behaviour is not specified. -
On a repeated start condition (
i2c_start_transferwhile a transfer is already ongoing), QEMU does not re-scan for devices to match to the address given. This means on a repeated start we can only change the transfer direction and the address byte is ignored. This is not the biggest issue but is worth documenting.
To address these issues, a new I2C interface could be created to allow for these features, while also wrapping the already existing I2C devices in QEMU. There is precedent for this in IbexIRQ which is a simple wrapper around QEMU IRQs.