documentation

Author: lujji

Makefile

@@ -1,9 +1,6 @@
-export PATH := $(PATH):$(HOME)/local/sdcc/bin
-
-MCU  = stm8s003f3
+MCU ?= stm8s003f3
 ARCH = stm8
 
-#F_CPU   ?= 2000000
 F_CPU   ?= 16000000
 TARGET  ?= main.ihx
 
@@ -17,6 +14,7 @@ CC       = sdcc
 LD       = sdld
 AS       = sdasstm8
 OBJCOPY  = sdobjcopy
+ASFLAGS  = -plosgff
 CFLAGS   = -m$(ARCH) -p$(MCU)
 CFLAGS  += -DF_CPU=$(F_CPU)UL -I.
 CFLAGS  += --stack-auto --noinduction --use-non-free --noinvariant --opt-code-size
@@ -29,7 +27,7 @@ $(TARGET): $(OBJS)
 	$(CC) $(LDFLAGS) $(OBJS) -o $@
 
 %.rel: %.s
-	$(AS) -plosgff $<
+	$(AS) $(ASFLAGS) $<
 
 %.rel: %.c
 	$(CC) $(CFLAGS) -c $< -o $@
@@ -42,17 +40,27 @@ clean:
 
 size:
 	@$(OBJCOPY) -I ihex --output-target=binary $(TARGET) $(TARGET).bin
-	@echo "-----\nImage size:"
+	@echo '-----\nImage size:'
 	@stat -L -c %s $(TARGET).bin
 
-opt-dump:
-	stm8flash -c stlinkv2 -p stm8s003f3 -s opt -r dump_opt.bin
+# enable write-protection on first 10 pages
+opt-set:
+	@echo '0x00 0x0a 0xf5 0x00 0xff 0x00 0xff 0x00 0xff 0x00 0xff' | xxd -r > opt.bin
+	stm8flash -c stlinkv2 -p stm8s003f3 -s opt -w opt.bin
+
+# reset option-bytes to factory defaults
+opt-reset:
+	@echo '0x00 0x00 0xff 0x00 0xff 0x00 0xff 0x00 0xff 0x00 0xff' | xxd -r > opt.bin
+	stm8flash -c stlinkv2 -p stm8s003f3 -s opt -w opt.bin
+
+dump-opt:
+	stm8flash -c stlinkv2 -p $(MCU) -s opt -r dump_opt.bin
 
-mem-dump:
-	stm8flash -c stlinkv2 -p stm8s003f3 -s flash -r dump_flash.bin
+dump-flash:
+	stm8flash -c stlinkv2 -p $(MCU) -s flash -r dump_flash.bin
 
 erase:
 	tr '\000' '\377' < /dev/zero | dd of=empty.bin bs=8192 count=1
-	stm8flash -c stlinkv2 -p stm8s003f3 -s flash -w empty.bin
+	stm8flash -c stlinkv2 -p $(MCU) -s flash -w empty.bin
 
-.PHONY: clean all program
+.PHONY: clean all flash size dump-opt dump-flash erase

README.md

@@ -1,13 +1,48 @@
 # stm8-bootloader
-A serial bootloader for low-density STM8S microcontrollers.
+Serial bootloader for STM8S microcontrollers.
 
-... work in progress ...
+## Features
 
-TL;DR
+* **small** - fits in 9 pages (547 bytes w/ SDCC v3.6.8 #9951)
+* **fast** - uploads 4k binary in 1 second @115200bps
+* **configurable** - can be adjusted for parts with different flash block size
+
+## Configuration
+
+The default configuration targets low-density devices (STM8S003). Configuration is located in `config.h`.
+* **BLOCK_SIZE** - flash block size according to device datasheet. This should be set to 64 for low-density devices or 128 for devices with >8k flash.
+* **BOOT_ADDR** - application boot address.
+* **BOOT_PIN** - entry jumper. This is set to PD3 by default.
+* **RELOCATE_IVT** - when set to 1 (default) the interrupt vectors are relocated. When set to 0 the bootloader will overwrite it's own interrupt vector table with the application's IVT, thus eliminating additional CPU overhead during interrupts. Write-protection cannot be used in this case and resulting binary is slightly larger.
+
+### Changing boot address
+Boot address must be a multiple of BLOCK_SIZE. Address is set in 2 places:
+ * config.h
+ * init.s
+
+Main application is compiled with `--code-loc <address>` option. When RELOCATE_IVT is set to 0, 0x80 must be subtracted from application address and isr29 must be implemented: `void dummy_isr() __interrupt(29) __naked { ; }`.
+
+## Build instructions
+Build and flash the bootloader:
 
-Short PD3 -> GND.
 ``` bash
 $ make && make flash
+```
+
+Enable write-protection (UBC) on pages 0-10:
+
+``` bash
+make opt-set
+```
+
+## Uploading the firmware
+
+There is a demo application inside `app` directory which toggles PD4 via interrupts. To upload the application short PD3 to ground, power-cycle the MCU and run the uploader utility.
+
+``` bash
 $ cd app && make
 $ python ../uploader/boot.py -p /dev/ttyUSB0 firmware.bin
 ```
+
+## Porting
+TBD

app/Makefile

@@ -1,16 +1,13 @@
-export PATH := $(PATH):$(HOME)/local/sdcc/bin
-
-MCU  = stm8s003f3
+MCU ?= stm8s003f3
 ARCH = stm8
 
 F_CPU   ?= 2000000
 TARGET  ?= main.ihx
 
-SRCS    := $(wildcard *.c $(LIBDIR)/*.c)
+SRCS    := $(wildcard *.c)
 OBJS     = $(SRCS:.c=.rel)
 
 CC       = sdcc
-LD       = sdld
 OBJCOPY  = sdobjcopy
 CFLAGS   = -m$(ARCH) -p$(MCU)
 CFLAGS  += -DF_CPU=$(F_CPU)UL -I. -I$(LIBDIR)
@@ -33,4 +30,4 @@ $(TARGET): $(OBJS)
 clean:
 	rm -f *.map *.asm *.rel *.ihx *.o *.sym *.lk *.lst *.rst *.cdb *.bin
 
-.PHONY: clean all program
+.PHONY: clean all

app/main.c

@@ -14,7 +14,7 @@ void tim4_isr() __interrupt(TIM4_ISR) {
     TIM4_SR &= ~(1 << TIM4_SR_UIF);
 }
 
-inline void timer_config() {
+static void timer_config() {
     /* Prescaler = 128 */
     TIM4_PSCR = 0b00000111;
 

main.c

@@ -191,7 +191,6 @@ inline void ram_cpy() {
         f_ram[i] = ((uint8_t *) ram_flash_write_block)[i];
 }
 
-// size: 750 -> 744 -> 738 -> 729 -> 721 -> 658 -> 644:654 -> 640:560 -> 623:547
 void bootloader_main() {
     BOOT_PIN_CR1 = 1 << BOOT_PIN;
     if (!(BOOT_PIN_IDR & (1 << BOOT_PIN))) {

uploader/boot.py

@@ -3,9 +3,9 @@
 
 BLOCK_SIZE = 64 # 128 for parts with >8k flash
 
-REQ_ENTER = [0xde, 0xad, 0xbe, 0xef]
-ACK  = [0xaa, 0xbb]
-NACK = [0xde, 0xad]
+REQ_ENTER = (0xde, 0xad, 0xbe, 0xef)
+ACK  = (0xaa, 0xbb)
+NACK = (0xde, 0xad)
 FILE = None
 
 def crc8_update(data, crc):
@@ -59,10 +59,12 @@ def bootloader_exec(port, baud):
             ser.flushOutput()
             chunk = bytearray(f.read(BLOCK_SIZE))
         ack = ser.read(2)
-        if ack == bytearray(NACK):
+        if ack == bytearray(ACK):
+            print('Done')
+        elif ack == bytearray(NACK):
             print('CRC mismatch')
-            return
-        print('Done')
+        else:
+            print('Invalid response')
     ser.close()
 
 if __name__ == "__main__":