@@ -1078,6 +1078,19 @@ body: |
10781078 ; GFX9-SUNK-NEXT: [[DEF2:%[0-9]+]]:vreg_256_align2 = IMPLICIT_DEF
10791079 ; GFX9-SUNK-NEXT: [[DEF3:%[0-9]+]]:vreg_256_align2 = IMPLICIT_DEF
10801080 ; GFX9-SUNK-NEXT: [[DEF4:%[0-9]+]]:vreg_256_align2 = IMPLICIT_DEF
1081+ ; GFX9-SUNK-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[DEF]].sub2, [[DEF1]].sub4, 0, implicit $exec
1082+ ; GFX9-SUNK-NEXT: S_BRANCH %bb.1
1083+ ; GFX9-SUNK-NEXT: {{ $}}
1084+ ; GFX9-SUNK-NEXT: bb.1:
1085+ ; GFX9-SUNK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
1086+ ; GFX9-SUNK-NEXT: {{ $}}
1087+ ; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_ADD_CO_U32_e64_1]]
1088+ ; GFX9-SUNK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
1089+ ; GFX9-SUNK-NEXT: S_BRANCH %bb.3
1090+ ; GFX9-SUNK-NEXT: {{ $}}
1091+ ; GFX9-SUNK-NEXT: bb.2:
1092+ ; GFX9-SUNK-NEXT: successors: %bb.4(0x80000000)
1093+ ; GFX9-SUNK-NEXT: {{ $}}
10811094 ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub0, 0, implicit $exec
10821095 ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub0, 0, implicit $exec
10831096 ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub0, 0, implicit $exec
@@ -1105,28 +1118,42 @@ body: |
11051118 ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_24:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
11061119 ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_25:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
11071120 ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_26:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
1108- ; GFX9-SUNK-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[DEF]].sub2, [[DEF1]].sub4, 0, implicit $exec
1109- ; GFX9-SUNK-NEXT: S_BRANCH %bb.1
1110- ; GFX9-SUNK-NEXT: {{ $}}
1111- ; GFX9-SUNK-NEXT: bb.1:
1112- ; GFX9-SUNK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
1113- ; GFX9-SUNK-NEXT: {{ $}}
1114- ; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_ADD_CO_U32_e64_1]]
1115- ; GFX9-SUNK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
1116- ; GFX9-SUNK-NEXT: S_BRANCH %bb.3
1117- ; GFX9-SUNK-NEXT: {{ $}}
1118- ; GFX9-SUNK-NEXT: bb.2:
1119- ; GFX9-SUNK-NEXT: successors: %bb.4(0x80000000)
1120- ; GFX9-SUNK-NEXT: {{ $}}
11211121 ; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
11221122 ; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
11231123 ; GFX9-SUNK-NEXT: S_BRANCH %bb.4
11241124 ; GFX9-SUNK-NEXT: {{ $}}
11251125 ; GFX9-SUNK-NEXT: bb.3:
11261126 ; GFX9-SUNK-NEXT: successors: %bb.4(0x80000000)
11271127 ; GFX9-SUNK-NEXT: {{ $}}
1128+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_27:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub0, 0, implicit $exec
1129+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_28:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub0, 0, implicit $exec
1130+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_29:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub0, 0, implicit $exec
1131+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_30:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub3, [[DEF1]].sub0, 0, implicit $exec
1132+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_31:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub4, [[DEF1]].sub0, 0, implicit $exec
1133+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_32:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub5, [[DEF1]].sub0, 0, implicit $exec
1134+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_33:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub6, [[DEF1]].sub0, 0, implicit $exec
1135+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_34:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub7, [[DEF1]].sub0, 0, implicit $exec
1136+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_35:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub1, 0, implicit $exec
1137+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_36:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub1, 0, implicit $exec
1138+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_37:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub1, 0, implicit $exec
1139+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_38:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub3, [[DEF1]].sub1, 0, implicit $exec
1140+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_39:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub4, [[DEF1]].sub1, 0, implicit $exec
1141+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_40:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub5, [[DEF1]].sub1, 0, implicit $exec
1142+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_41:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub6, [[DEF1]].sub1, 0, implicit $exec
1143+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_42:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub7, [[DEF1]].sub1, 0, implicit $exec
1144+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_43:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub2, 0, implicit $exec
1145+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_44:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub2, 0, implicit $exec
1146+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_45:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub2, 0, implicit $exec
1147+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_46:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub3, [[DEF1]].sub2, 0, implicit $exec
1148+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_47:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub4, [[DEF1]].sub2, 0, implicit $exec
1149+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_48:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub5, [[DEF1]].sub2, 0, implicit $exec
1150+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_49:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub6, [[DEF1]].sub2, 0, implicit $exec
1151+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_50:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub7, [[DEF1]].sub2, 0, implicit $exec
1152+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_51:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
1153+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_52:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
1154+ ; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_53:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
11281155 ; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
1129- ; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_ ]], implicit [[V_ADD_U32_e64_1 ]], implicit [[V_ADD_U32_e64_2 ]], implicit [[V_ADD_U32_e64_3 ]], implicit [[V_ADD_U32_e64_4 ]], implicit [[V_ADD_U32_e64_5 ]], implicit [[V_ADD_U32_e64_6 ]], implicit [[V_ADD_U32_e64_7 ]], implicit [[V_ADD_U32_e64_8 ]], implicit [[V_ADD_U32_e64_9 ]], implicit [[V_ADD_U32_e64_10 ]], implicit [[V_ADD_U32_e64_11 ]], implicit [[V_ADD_U32_e64_12 ]], implicit [[V_ADD_U32_e64_13 ]], implicit [[V_ADD_U32_e64_14 ]], implicit [[V_ADD_U32_e64_15 ]], implicit [[V_ADD_U32_e64_16 ]], implicit [[V_ADD_U32_e64_17 ]], implicit [[V_ADD_U32_e64_18 ]], implicit [[V_ADD_U32_e64_19 ]], implicit [[V_ADD_U32_e64_20 ]], implicit [[V_ADD_U32_e64_21 ]], implicit [[V_ADD_U32_e64_22 ]], implicit [[V_ADD_U32_e64_23 ]], implicit [[V_ADD_U32_e64_24 ]], implicit [[V_ADD_U32_e64_25 ]], implicit [[V_ADD_U32_e64_26 ]]
1156+ ; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_27 ]], implicit [[V_ADD_U32_e64_28 ]], implicit [[V_ADD_U32_e64_29 ]], implicit [[V_ADD_U32_e64_30 ]], implicit [[V_ADD_U32_e64_31 ]], implicit [[V_ADD_U32_e64_32 ]], implicit [[V_ADD_U32_e64_33 ]], implicit [[V_ADD_U32_e64_34 ]], implicit [[V_ADD_U32_e64_35 ]], implicit [[V_ADD_U32_e64_36 ]], implicit [[V_ADD_U32_e64_37 ]], implicit [[V_ADD_U32_e64_38 ]], implicit [[V_ADD_U32_e64_39 ]], implicit [[V_ADD_U32_e64_40 ]], implicit [[V_ADD_U32_e64_41 ]], implicit [[V_ADD_U32_e64_42 ]], implicit [[V_ADD_U32_e64_43 ]], implicit [[V_ADD_U32_e64_44 ]], implicit [[V_ADD_U32_e64_45 ]], implicit [[V_ADD_U32_e64_46 ]], implicit [[V_ADD_U32_e64_47 ]], implicit [[V_ADD_U32_e64_48 ]], implicit [[V_ADD_U32_e64_49 ]], implicit [[V_ADD_U32_e64_50 ]], implicit [[V_ADD_U32_e64_51 ]], implicit [[V_ADD_U32_e64_52 ]], implicit [[V_ADD_U32_e64_53 ]]
11301157 ; GFX9-SUNK-NEXT: S_BRANCH %bb.4
11311158 ; GFX9-SUNK-NEXT: {{ $}}
11321159 ; GFX9-SUNK-NEXT: bb.4:
@@ -1149,6 +1176,19 @@ body: |
11491176 ; GFX10-SUNK-NEXT: [[DEF2:%[0-9]+]]:vreg_256 = IMPLICIT_DEF
11501177 ; GFX10-SUNK-NEXT: [[DEF3:%[0-9]+]]:vreg_256 = IMPLICIT_DEF
11511178 ; GFX10-SUNK-NEXT: [[DEF4:%[0-9]+]]:vreg_256 = IMPLICIT_DEF
1179+ ; GFX10-SUNK-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[DEF]].sub2, [[DEF1]].sub4, 0, implicit $exec
1180+ ; GFX10-SUNK-NEXT: S_BRANCH %bb.1
1181+ ; GFX10-SUNK-NEXT: {{ $}}
1182+ ; GFX10-SUNK-NEXT: bb.1:
1183+ ; GFX10-SUNK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
1184+ ; GFX10-SUNK-NEXT: {{ $}}
1185+ ; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_ADD_CO_U32_e64_1]]
1186+ ; GFX10-SUNK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
1187+ ; GFX10-SUNK-NEXT: S_BRANCH %bb.3
1188+ ; GFX10-SUNK-NEXT: {{ $}}
1189+ ; GFX10-SUNK-NEXT: bb.2:
1190+ ; GFX10-SUNK-NEXT: successors: %bb.4(0x80000000)
1191+ ; GFX10-SUNK-NEXT: {{ $}}
11521192 ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub0, 0, implicit $exec
11531193 ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub0, 0, implicit $exec
11541194 ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub0, 0, implicit $exec
@@ -1176,28 +1216,42 @@ body: |
11761216 ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_24:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
11771217 ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_25:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
11781218 ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_26:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
1179- ; GFX10-SUNK-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[DEF]].sub2, [[DEF1]].sub4, 0, implicit $exec
1180- ; GFX10-SUNK-NEXT: S_BRANCH %bb.1
1181- ; GFX10-SUNK-NEXT: {{ $}}
1182- ; GFX10-SUNK-NEXT: bb.1:
1183- ; GFX10-SUNK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
1184- ; GFX10-SUNK-NEXT: {{ $}}
1185- ; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_ADD_CO_U32_e64_1]]
1186- ; GFX10-SUNK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
1187- ; GFX10-SUNK-NEXT: S_BRANCH %bb.3
1188- ; GFX10-SUNK-NEXT: {{ $}}
1189- ; GFX10-SUNK-NEXT: bb.2:
1190- ; GFX10-SUNK-NEXT: successors: %bb.4(0x80000000)
1191- ; GFX10-SUNK-NEXT: {{ $}}
11921219 ; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
11931220 ; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
11941221 ; GFX10-SUNK-NEXT: S_BRANCH %bb.4
11951222 ; GFX10-SUNK-NEXT: {{ $}}
11961223 ; GFX10-SUNK-NEXT: bb.3:
11971224 ; GFX10-SUNK-NEXT: successors: %bb.4(0x80000000)
11981225 ; GFX10-SUNK-NEXT: {{ $}}
1226+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_27:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub0, 0, implicit $exec
1227+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_28:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub0, 0, implicit $exec
1228+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_29:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub0, 0, implicit $exec
1229+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_30:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub3, [[DEF1]].sub0, 0, implicit $exec
1230+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_31:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub4, [[DEF1]].sub0, 0, implicit $exec
1231+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_32:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub5, [[DEF1]].sub0, 0, implicit $exec
1232+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_33:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub6, [[DEF1]].sub0, 0, implicit $exec
1233+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_34:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub7, [[DEF1]].sub0, 0, implicit $exec
1234+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_35:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub1, 0, implicit $exec
1235+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_36:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub1, 0, implicit $exec
1236+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_37:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub1, 0, implicit $exec
1237+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_38:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub3, [[DEF1]].sub1, 0, implicit $exec
1238+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_39:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub4, [[DEF1]].sub1, 0, implicit $exec
1239+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_40:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub5, [[DEF1]].sub1, 0, implicit $exec
1240+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_41:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub6, [[DEF1]].sub1, 0, implicit $exec
1241+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_42:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub7, [[DEF1]].sub1, 0, implicit $exec
1242+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_43:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub2, 0, implicit $exec
1243+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_44:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub2, 0, implicit $exec
1244+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_45:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub2, 0, implicit $exec
1245+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_46:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub3, [[DEF1]].sub2, 0, implicit $exec
1246+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_47:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub4, [[DEF1]].sub2, 0, implicit $exec
1247+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_48:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub5, [[DEF1]].sub2, 0, implicit $exec
1248+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_49:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub6, [[DEF1]].sub2, 0, implicit $exec
1249+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_50:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub7, [[DEF1]].sub2, 0, implicit $exec
1250+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_51:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
1251+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_52:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
1252+ ; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_53:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
11991253 ; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
1200- ; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_ ]], implicit [[V_ADD_U32_e64_1 ]], implicit [[V_ADD_U32_e64_2 ]], implicit [[V_ADD_U32_e64_3 ]], implicit [[V_ADD_U32_e64_4 ]], implicit [[V_ADD_U32_e64_5 ]], implicit [[V_ADD_U32_e64_6 ]], implicit [[V_ADD_U32_e64_7 ]], implicit [[V_ADD_U32_e64_8 ]], implicit [[V_ADD_U32_e64_9 ]], implicit [[V_ADD_U32_e64_10 ]], implicit [[V_ADD_U32_e64_11 ]], implicit [[V_ADD_U32_e64_12 ]], implicit [[V_ADD_U32_e64_13 ]], implicit [[V_ADD_U32_e64_14 ]], implicit [[V_ADD_U32_e64_15 ]], implicit [[V_ADD_U32_e64_16 ]], implicit [[V_ADD_U32_e64_17 ]], implicit [[V_ADD_U32_e64_18 ]], implicit [[V_ADD_U32_e64_19 ]], implicit [[V_ADD_U32_e64_20 ]], implicit [[V_ADD_U32_e64_21 ]], implicit [[V_ADD_U32_e64_22 ]], implicit [[V_ADD_U32_e64_23 ]], implicit [[V_ADD_U32_e64_24 ]], implicit [[V_ADD_U32_e64_25 ]], implicit [[V_ADD_U32_e64_26 ]]
1254+ ; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_27 ]], implicit [[V_ADD_U32_e64_28 ]], implicit [[V_ADD_U32_e64_29 ]], implicit [[V_ADD_U32_e64_30 ]], implicit [[V_ADD_U32_e64_31 ]], implicit [[V_ADD_U32_e64_32 ]], implicit [[V_ADD_U32_e64_33 ]], implicit [[V_ADD_U32_e64_34 ]], implicit [[V_ADD_U32_e64_35 ]], implicit [[V_ADD_U32_e64_36 ]], implicit [[V_ADD_U32_e64_37 ]], implicit [[V_ADD_U32_e64_38 ]], implicit [[V_ADD_U32_e64_39 ]], implicit [[V_ADD_U32_e64_40 ]], implicit [[V_ADD_U32_e64_41 ]], implicit [[V_ADD_U32_e64_42 ]], implicit [[V_ADD_U32_e64_43 ]], implicit [[V_ADD_U32_e64_44 ]], implicit [[V_ADD_U32_e64_45 ]], implicit [[V_ADD_U32_e64_46 ]], implicit [[V_ADD_U32_e64_47 ]], implicit [[V_ADD_U32_e64_48 ]], implicit [[V_ADD_U32_e64_49 ]], implicit [[V_ADD_U32_e64_50 ]], implicit [[V_ADD_U32_e64_51 ]], implicit [[V_ADD_U32_e64_52 ]], implicit [[V_ADD_U32_e64_53 ]]
12011255 ; GFX10-SUNK-NEXT: S_BRANCH %bb.4
12021256 ; GFX10-SUNK-NEXT: {{ $}}
12031257 ; GFX10-SUNK-NEXT: bb.4:
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