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[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (llvm#150017)
Similar to InstCombinerImpl::freezeOtherUses, attempt to ensure that we merge multiple frozen/unfrozen uses of a SDValue. This fixes a number of hasOneUse() problems when trying to push FREEZE nodes through the DAG. Remove SimplifyMultipleUseDemandedBits handling of FREEZE nodes as we now want to keep the common node, and not bypass for some nodes just because of DemandedElts. Fixes llvm#149799
1 parent a534896 commit d561259

40 files changed

+4640
-4633
lines changed

‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp‎

Lines changed: 12 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -4075,18 +4075,11 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
40754075
unsigned BitWidth = VT.getScalarSizeInBits();
40764076
SDLoc DL(N);
40774077

4078-
auto PeekThroughFreeze = [](SDValue N) {
4079-
if (N->getOpcode() == ISD::FREEZE && N.hasOneUse())
4080-
return N->getOperand(0);
4081-
return N;
4082-
};
4083-
40844078
if (SDValue V = foldSubCtlzNot<EmptyMatchContext>(N, DAG))
40854079
return V;
40864080

40874081
// fold (sub x, x) -> 0
4088-
// FIXME: Refactor this and xor and other similar operations together.
4089-
if (PeekThroughFreeze(N0) == PeekThroughFreeze(N1))
4082+
if (N0 == N1)
40904083
return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations);
40914084

40924085
// fold (sub c1, c2) -> c3
@@ -16756,6 +16749,17 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
1675616749
if (DAG.isGuaranteedNotToBeUndefOrPoison(N0, /*PoisonOnly*/ false))
1675716750
return N0;
1675816751

16752+
// If we have frozen and unfrozen users of N0, update so everything uses N.
16753+
if (!N0.isUndef() && !N0.hasOneUse()) {
16754+
SDValue FrozenN0(N, 0);
16755+
DAG.ReplaceAllUsesOfValueWith(N0, FrozenN0);
16756+
// ReplaceAllUsesOfValueWith will have also updated the use in N, thus
16757+
// creating a cycle in a DAG. Let's undo that by mutating the freeze.
16758+
assert(N->getOperand(0) == FrozenN0 && "Expected cycle in DAG");
16759+
DAG.UpdateNodeOperands(N, N0);
16760+
return FrozenN0;
16761+
}
16762+
1675916763
// We currently avoid folding freeze over SRA/SRL, due to the problems seen
1676016764
// with (freeze (assert ext)) blocking simplifications of SRA/SRL. See for
1676116765
// example https://reviews.llvm.org/D136529#4120959.

‎llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp‎

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -775,13 +775,6 @@ SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
775775

776776
break;
777777
}
778-
case ISD::FREEZE: {
779-
SDValue N0 = Op.getOperand(0);
780-
if (DAG.isGuaranteedNotToBeUndefOrPoison(N0, DemandedElts,
781-
/*PoisonOnly=*/false, Depth + 1))
782-
return N0;
783-
break;
784-
}
785778
case ISD::AND: {
786779
LHSKnown = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
787780
RHSKnown = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);

‎llvm/test/CodeGen/AArch64/vselect-ext.ll‎

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -175,12 +175,12 @@ define <8 x i32> @same_zext_used_in_cmp_unsigned_pred_and_select_v8i32_from_v8i1
175175
; CHECK: ; %bb.0:
176176
; CHECK-NEXT: bic.8h v0, #128, lsl #8
177177
; CHECK-NEXT: movi.4s v1, #10
178-
; CHECK-NEXT: ushll.4s v2, v0, #0
179-
; CHECK-NEXT: ushll2.4s v0, v0, #0
180-
; CHECK-NEXT: cmhi.4s v3, v2, v1
181-
; CHECK-NEXT: cmhi.4s v1, v0, v1
182-
; CHECK-NEXT: and.16b v1, v1, v0
183-
; CHECK-NEXT: and.16b v0, v3, v2
178+
; CHECK-NEXT: ushll2.4s v2, v0, #0
179+
; CHECK-NEXT: ushll.4s v0, v0, #0
180+
; CHECK-NEXT: cmhi.4s v3, v0, v1
181+
; CHECK-NEXT: cmhi.4s v1, v2, v1
182+
; CHECK-NEXT: and.16b v1, v1, v2
183+
; CHECK-NEXT: and.16b v0, v3, v0
184184
; CHECK-NEXT: ret
185185
%ext = zext <8 x i15> %a to <8 x i32>
186186
%cmp = icmp ugt <8 x i15> %a, <i15 10, i15 10, i15 10, i15 10, i15 10, i15 10, i15 10, i15 10>
@@ -289,12 +289,12 @@ define <8 x i32> @same_zext_used_in_cmp_eq_and_select_v8i32_from_v8i13(<8 x i13>
289289
; CHECK: ; %bb.0:
290290
; CHECK-NEXT: bic.8h v0, #224, lsl #8
291291
; CHECK-NEXT: movi.4s v1, #10
292-
; CHECK-NEXT: ushll.4s v2, v0, #0
293-
; CHECK-NEXT: ushll2.4s v0, v0, #0
294-
; CHECK-NEXT: cmeq.4s v3, v2, v1
295-
; CHECK-NEXT: cmeq.4s v1, v0, v1
296-
; CHECK-NEXT: and.16b v1, v1, v0
297-
; CHECK-NEXT: and.16b v0, v3, v2
292+
; CHECK-NEXT: ushll2.4s v2, v0, #0
293+
; CHECK-NEXT: ushll.4s v0, v0, #0
294+
; CHECK-NEXT: cmeq.4s v3, v0, v1
295+
; CHECK-NEXT: cmeq.4s v1, v2, v1
296+
; CHECK-NEXT: and.16b v1, v1, v2
297+
; CHECK-NEXT: and.16b v0, v3, v0
298298
; CHECK-NEXT: ret
299299
%ext = zext <8 x i13> %a to <8 x i32>
300300
%cmp = icmp eq <8 x i13> %a, <i13 10, i13 10, i13 10, i13 10, i13 10, i13 10, i13 10, i13 10>
@@ -429,17 +429,17 @@ define <8 x i32> @same_sext_used_in_cmp_eq_and_select_v8i32(<8 x i16> %a) {
429429
define <8 x i32> @same_sext_used_in_cmp_eq_and_select_v8i32_from_v8i13(<8 x i13> %a) {
430430
; CHECK-LABEL: same_sext_used_in_cmp_eq_and_select_v8i32_from_v8i13:
431431
; CHECK: ; %bb.0:
432-
; CHECK-NEXT: ushll2.4s v2, v0, #0
433-
; CHECK-NEXT: ushll.4s v0, v0, #0
432+
; CHECK-NEXT: ushll.4s v2, v0, #0
433+
; CHECK-NEXT: ushll2.4s v0, v0, #0
434434
; CHECK-NEXT: movi.4s v1, #10
435435
; CHECK-NEXT: shl.4s v0, v0, #19
436436
; CHECK-NEXT: shl.4s v2, v2, #19
437437
; CHECK-NEXT: sshr.4s v0, v0, #19
438438
; CHECK-NEXT: sshr.4s v2, v2, #19
439-
; CHECK-NEXT: cmeq.4s v3, v0, v1
440-
; CHECK-NEXT: cmeq.4s v1, v2, v1
441-
; CHECK-NEXT: and.16b v1, v1, v2
442-
; CHECK-NEXT: and.16b v0, v3, v0
439+
; CHECK-NEXT: cmeq.4s v3, v2, v1
440+
; CHECK-NEXT: cmeq.4s v1, v0, v1
441+
; CHECK-NEXT: and.16b v1, v1, v0
442+
; CHECK-NEXT: and.16b v0, v3, v2
443443
; CHECK-NEXT: ret
444444
%ext = sext <8 x i13> %a to <8 x i32>
445445
%cmp = icmp eq <8 x i13> %a, <i13 10, i13 10, i13 10, i13 10, i13 10, i13 10, i13 10, i13 10>
@@ -493,17 +493,17 @@ entry:
493493
define <8 x i32> @same_sext_used_in_cmp_unsigned_pred_and_select_v8i32_from_v8i15(<8 x i15> %a) {
494494
; CHECK-LABEL: same_sext_used_in_cmp_unsigned_pred_and_select_v8i32_from_v8i15:
495495
; CHECK: ; %bb.0:
496-
; CHECK-NEXT: ushll2.4s v2, v0, #0
497-
; CHECK-NEXT: ushll.4s v0, v0, #0
496+
; CHECK-NEXT: ushll.4s v2, v0, #0
497+
; CHECK-NEXT: ushll2.4s v0, v0, #0
498498
; CHECK-NEXT: movi.4s v1, #10
499499
; CHECK-NEXT: shl.4s v0, v0, #17
500500
; CHECK-NEXT: shl.4s v2, v2, #17
501501
; CHECK-NEXT: sshr.4s v0, v0, #17
502502
; CHECK-NEXT: sshr.4s v2, v2, #17
503-
; CHECK-NEXT: cmge.4s v3, v0, v1
504-
; CHECK-NEXT: cmge.4s v1, v2, v1
505-
; CHECK-NEXT: and.16b v1, v1, v2
506-
; CHECK-NEXT: and.16b v0, v3, v0
503+
; CHECK-NEXT: cmge.4s v3, v2, v1
504+
; CHECK-NEXT: cmge.4s v1, v0, v1
505+
; CHECK-NEXT: and.16b v1, v1, v0
506+
; CHECK-NEXT: and.16b v0, v3, v2
507507
; CHECK-NEXT: ret
508508
%ext = sext <8 x i15> %a to <8 x i32>
509509
%cmp = icmp sge <8 x i15> %a, <i15 10, i15 10, i15 10, i15 10, i15 10, i15 10, i15 10, i15 10>

‎llvm/test/CodeGen/AMDGPU/div_i128.ll‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -495,8 +495,9 @@ define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
495495
; GFX9-O0-NEXT: v_and_b32_e64 v6, 1, v6
496496
; GFX9-O0-NEXT: v_cmp_eq_u32_e64 s[8:9], v6, 1
497497
; GFX9-O0-NEXT: s_or_b64 s[8:9], s[4:5], s[8:9]
498-
; GFX9-O0-NEXT: s_mov_b64 s[4:5], -1
499-
; GFX9-O0-NEXT: s_xor_b64 s[4:5], s[8:9], s[4:5]
498+
; GFX9-O0-NEXT: s_mov_b64 s[14:15], -1
499+
; GFX9-O0-NEXT: s_mov_b64 s[4:5], s[8:9]
500+
; GFX9-O0-NEXT: s_xor_b64 s[4:5], s[4:5], s[14:15]
500501
; GFX9-O0-NEXT: v_mov_b32_e32 v6, v5
501502
; GFX9-O0-NEXT: s_mov_b32 s14, s13
502503
; GFX9-O0-NEXT: v_xor_b32_e64 v6, v6, s14
@@ -2679,8 +2680,9 @@ define i128 @v_udiv_i128_vv(i128 %lhs, i128 %rhs) {
26792680
; GFX9-O0-NEXT: v_and_b32_e64 v6, 1, v6
26802681
; GFX9-O0-NEXT: v_cmp_eq_u32_e64 s[8:9], v6, 1
26812682
; GFX9-O0-NEXT: s_or_b64 s[8:9], s[4:5], s[8:9]
2682-
; GFX9-O0-NEXT: s_mov_b64 s[4:5], -1
2683-
; GFX9-O0-NEXT: s_xor_b64 s[4:5], s[8:9], s[4:5]
2683+
; GFX9-O0-NEXT: s_mov_b64 s[14:15], -1
2684+
; GFX9-O0-NEXT: s_mov_b64 s[4:5], s[8:9]
2685+
; GFX9-O0-NEXT: s_xor_b64 s[4:5], s[4:5], s[14:15]
26842686
; GFX9-O0-NEXT: v_mov_b32_e32 v6, v5
26852687
; GFX9-O0-NEXT: s_mov_b32 s14, s13
26862688
; GFX9-O0-NEXT: v_xor_b32_e64 v6, v6, s14

‎llvm/test/CodeGen/AMDGPU/freeze.ll‎

Lines changed: 12 additions & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -5692,10 +5692,6 @@ define void @freeze_v3i16(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) {
56925692
; GFX6-SDAG-NEXT: s_mov_b32 s5, s6
56935693
; GFX6-SDAG-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
56945694
; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0)
5695-
; GFX6-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
5696-
; GFX6-SDAG-NEXT: v_and_b32_e32 v0, 0xffff, v0
5697-
; GFX6-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v4
5698-
; GFX6-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
56995695
; GFX6-SDAG-NEXT: buffer_store_short v1, v[2:3], s[4:7], 0 addr64 offset:4
57005696
; GFX6-SDAG-NEXT: buffer_store_dword v0, v[2:3], s[4:7], 0 addr64
57015697
; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0)
@@ -5725,10 +5721,6 @@ define void @freeze_v3i16(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) {
57255721
; GFX7-SDAG-NEXT: s_mov_b32 s5, s6
57265722
; GFX7-SDAG-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
57275723
; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
5728-
; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
5729-
; GFX7-SDAG-NEXT: v_and_b32_e32 v0, 0xffff, v0
5730-
; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v4
5731-
; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
57325724
; GFX7-SDAG-NEXT: buffer_store_short v1, v[2:3], s[4:7], 0 addr64 offset:4
57335725
; GFX7-SDAG-NEXT: buffer_store_dword v0, v[2:3], s[4:7], 0 addr64
57345726
; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
@@ -6351,10 +6343,6 @@ define void @freeze_v3f16(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) {
63516343
; GFX6-SDAG-NEXT: s_mov_b32 s5, s6
63526344
; GFX6-SDAG-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
63536345
; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0)
6354-
; GFX6-SDAG-NEXT: v_and_b32_e32 v4, 0xffff, v0
6355-
; GFX6-SDAG-NEXT: v_lshrrev_b32_e32 v0, 16, v0
6356-
; GFX6-SDAG-NEXT: v_lshlrev_b32_e32 v0, 16, v0
6357-
; GFX6-SDAG-NEXT: v_or_b32_e32 v0, v4, v0
63586346
; GFX6-SDAG-NEXT: buffer_store_short v1, v[2:3], s[4:7], 0 addr64 offset:4
63596347
; GFX6-SDAG-NEXT: buffer_store_dword v0, v[2:3], s[4:7], 0 addr64
63606348
; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0)
@@ -6384,10 +6372,6 @@ define void @freeze_v3f16(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) {
63846372
; GFX7-SDAG-NEXT: s_mov_b32 s5, s6
63856373
; GFX7-SDAG-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
63866374
; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
6387-
; GFX7-SDAG-NEXT: v_and_b32_e32 v4, 0xffff, v0
6388-
; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v0, 16, v0
6389-
; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v0, 16, v0
6390-
; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v4, v0
63916375
; GFX7-SDAG-NEXT: buffer_store_short v1, v[2:3], s[4:7], 0 addr64 offset:4
63926376
; GFX7-SDAG-NEXT: buffer_store_dword v0, v[2:3], s[4:7], 0 addr64
63936377
; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
@@ -12347,14 +12331,9 @@ define void @freeze_v3i8(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) {
1234712331
; GFX6-SDAG-NEXT: s_mov_b32 s5, s6
1234812332
; GFX6-SDAG-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64
1234912333
; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0)
12350-
; GFX6-SDAG-NEXT: v_lshrrev_b32_e32 v4, 8, v0
12351-
; GFX6-SDAG-NEXT: v_and_b32_e32 v4, 0xff, v4
1235212334
; GFX6-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v0
12353-
; GFX6-SDAG-NEXT: v_and_b32_e32 v0, 0xff, v0
12354-
; GFX6-SDAG-NEXT: v_lshlrev_b32_e32 v4, 8, v4
12355-
; GFX6-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
12356-
; GFX6-SDAG-NEXT: buffer_store_byte v1, v[2:3], s[4:7], 0 addr64 offset:2
1235712335
; GFX6-SDAG-NEXT: buffer_store_short v0, v[2:3], s[4:7], 0 addr64
12336+
; GFX6-SDAG-NEXT: buffer_store_byte v1, v[2:3], s[4:7], 0 addr64 offset:2
1235812337
; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0)
1235912338
; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
1236012339
;
@@ -12392,14 +12371,9 @@ define void @freeze_v3i8(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) {
1239212371
; GFX7-SDAG-NEXT: s_mov_b32 s5, s6
1239312372
; GFX7-SDAG-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64
1239412373
; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
12395-
; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v4, 8, v0
12396-
; GFX7-SDAG-NEXT: v_and_b32_e32 v4, 0xff, v4
1239712374
; GFX7-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v0
12398-
; GFX7-SDAG-NEXT: v_and_b32_e32 v0, 0xff, v0
12399-
; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v4, 8, v4
12400-
; GFX7-SDAG-NEXT: v_or_b32_e32 v0, v0, v4
12401-
; GFX7-SDAG-NEXT: buffer_store_byte v1, v[2:3], s[4:7], 0 addr64 offset:2
1240212375
; GFX7-SDAG-NEXT: buffer_store_short v0, v[2:3], s[4:7], 0 addr64
12376+
; GFX7-SDAG-NEXT: buffer_store_byte v1, v[2:3], s[4:7], 0 addr64 offset:2
1240312377
; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)
1240412378
; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]
1240512379
;
@@ -12474,11 +12448,7 @@ define void @freeze_v3i8(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) {
1247412448
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1247512449
; GFX10-SDAG-NEXT: global_load_dword v0, v[0:1], off
1247612450
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)
12477-
; GFX10-SDAG-NEXT: v_lshrrev_b16 v1, 8, v0
12478-
; GFX10-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v0
12479-
; GFX10-SDAG-NEXT: v_lshlrev_b16 v1, 8, v1
12480-
; GFX10-SDAG-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
12481-
; GFX10-SDAG-NEXT: global_store_byte v[2:3], v4, off offset:2
12451+
; GFX10-SDAG-NEXT: global_store_byte_d16_hi v[2:3], v0, off offset:2
1248212452
; GFX10-SDAG-NEXT: global_store_short v[2:3], v0, off
1248312453
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
1248412454
;
@@ -12499,36 +12469,15 @@ define void @freeze_v3i8(ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) {
1249912469
; GFX10-GISEL-NEXT: global_store_byte_d16_hi v[2:3], v0, off offset:2
1250012470
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
1250112471
;
12502-
; GFX11-SDAG-TRUE16-LABEL: freeze_v3i8:
12503-
; GFX11-SDAG-TRUE16: ; %bb.0:
12504-
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12505-
; GFX11-SDAG-TRUE16-NEXT: global_load_b32 v1, v[0:1], off
12506-
; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
12507-
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0)
12508-
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b16 v0.l, 8, v1.l
12509-
; GFX11-SDAG-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v1.l
12510-
; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.h
12511-
; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v0.l
12512-
; GFX11-SDAG-TRUE16-NEXT: v_or_b16 v0.l, v0.h, v0.l
12513-
; GFX11-SDAG-TRUE16-NEXT: s_clause 0x1
12514-
; GFX11-SDAG-TRUE16-NEXT: global_store_b8 v[2:3], v4, off offset:2
12515-
; GFX11-SDAG-TRUE16-NEXT: global_store_b16 v[2:3], v0, off
12516-
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
12517-
;
12518-
; GFX11-SDAG-FAKE16-LABEL: freeze_v3i8:
12519-
; GFX11-SDAG-FAKE16: ; %bb.0:
12520-
; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12521-
; GFX11-SDAG-FAKE16-NEXT: global_load_b32 v0, v[0:1], off
12522-
; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0)
12523-
; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b16 v1, 8, v0
12524-
; GFX11-SDAG-FAKE16-NEXT: v_and_b32_e32 v4, 0xff, v0
12525-
; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
12526-
; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b16 v1, 8, v1
12527-
; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v1, v4, v1
12528-
; GFX11-SDAG-FAKE16-NEXT: s_clause 0x1
12529-
; GFX11-SDAG-FAKE16-NEXT: global_store_b8 v[2:3], v0, off offset:2
12530-
; GFX11-SDAG-FAKE16-NEXT: global_store_b16 v[2:3], v1, off
12531-
; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
12472+
; GFX11-SDAG-LABEL: freeze_v3i8:
12473+
; GFX11-SDAG: ; %bb.0:
12474+
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12475+
; GFX11-SDAG-NEXT: global_load_b32 v0, v[0:1], off
12476+
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)
12477+
; GFX11-SDAG-NEXT: s_clause 0x1
12478+
; GFX11-SDAG-NEXT: global_store_d16_hi_b8 v[2:3], v0, off offset:2
12479+
; GFX11-SDAG-NEXT: global_store_b16 v[2:3], v0, off
12480+
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
1253212481
;
1253312482
; GFX11-GISEL-LABEL: freeze_v3i8:
1253412483
; GFX11-GISEL: ; %bb.0:

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