@@ -1143,16 +1143,6 @@ bool RISCVVLOptimizer::isCandidate(const MachineInstr &MI) const {
11431143 if (MI.getNumDefs () != 1 )
11441144 return false ;
11451145
1146- unsigned VLOpNum = RISCVII::getVLOpNum (Desc);
1147- const MachineOperand &VLOp = MI.getOperand (VLOpNum);
1148-
1149- // If the VL is 1, then there is no need to reduce it. This is an
1150- // optimization, not needed to preserve correctness.
1151- if (VLOp.isImm () && VLOp.getImm () == 1 ) {
1152- LLVM_DEBUG (dbgs () << " Not a candidate because VL is already 1\n " );
1153- return false ;
1154- }
1155-
11561146 if (MI.mayRaiseFPException ()) {
11571147 LLVM_DEBUG (dbgs () << " Not a candidate because may raise FP exception\n " );
11581148 return false ;
@@ -1285,16 +1275,23 @@ std::optional<MachineOperand> RISCVVLOptimizer::checkUsers(MachineInstr &MI) {
12851275bool RISCVVLOptimizer::tryReduceVL (MachineInstr &MI) {
12861276 LLVM_DEBUG (dbgs () << " Trying to reduce VL for " << MI << " \n " );
12871277
1278+ unsigned VLOpNum = RISCVII::getVLOpNum (MI.getDesc ());
1279+ MachineOperand &VLOp = MI.getOperand (VLOpNum);
1280+
1281+ // If the VL is 1, then there is no need to reduce it. This is an
1282+ // optimization, not needed to preserve correctness.
1283+ if (VLOp.isImm () && VLOp.getImm () == 1 ) {
1284+ LLVM_DEBUG (dbgs () << " Abort due to VL == 1, no point in reducing.\n " );
1285+ return false ;
1286+ }
1287+
12881288 auto CommonVL = checkUsers (MI);
12891289 if (!CommonVL)
12901290 return false ;
12911291
12921292 assert ((CommonVL->isImm () || CommonVL->getReg ().isVirtual ()) &&
12931293 " Expected VL to be an Imm or virtual Reg" );
12941294
1295- unsigned VLOpNum = RISCVII::getVLOpNum (MI.getDesc ());
1296- MachineOperand &VLOp = MI.getOperand (VLOpNum);
1297-
12981295 if (!RISCV::isVLKnownLE (*CommonVL, VLOp)) {
12991296 LLVM_DEBUG (dbgs () << " Abort due to CommonVL not <= VLOp.\n " );
13001297 return false ;
@@ -1345,6 +1342,8 @@ bool RISCVVLOptimizer::runOnMachineFunction(MachineFunction &MF) {
13451342 continue ;
13461343
13471344 MachineInstr *DefMI = MRI->getVRegDef (Op.getReg ());
1345+ if (!isCandidate (*DefMI))
1346+ continue ;
13481347
13491348 if (IgnoreSameBlock && DefMI->getParent () == MI.getParent ())
13501349 continue ;
@@ -1376,8 +1375,7 @@ bool RISCVVLOptimizer::runOnMachineFunction(MachineFunction &MF) {
13761375 while (!Worklist.empty ()) {
13771376 assert (MadeChange);
13781377 MachineInstr &MI = *Worklist.pop_back_val ();
1379- if (!isCandidate (MI))
1380- continue ;
1378+ assert (isCandidate (MI));
13811379 if (!tryReduceVL (MI))
13821380 continue ;
13831381 PushOperands (MI, /* IgnoreSameBlock*/ false );
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