[X86] Add test coverage for llvm#143456

Author: RKSimon

llvm/test/CodeGen/X86/sad.ll

@@ -1177,7 +1177,51 @@ bb:
   %tmp28 = extractelement <16 x i32> %tmp27, i64 0
   ret i32 %tmp28
 }
+declare <16 x i32> @llvm.abs.v16i32(<16 x i32>, i1 immarg)
+
+define i32 @PR143456(ptr %p0, ptr %p1) {
+; SSE2-LABEL: PR143456:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
+; SSE2-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero
+; SSE2-NEXT:    movdqa %xmm0, %xmm2
+; SSE2-NEXT:    pminub %xmm1, %xmm2
+; SSE2-NEXT:    pmaxub %xmm1, %xmm0
+; SSE2-NEXT:    psubb %xmm2, %xmm0
+; SSE2-NEXT:    pxor %xmm1, %xmm1
+; SSE2-NEXT:    psadbw %xmm0, %xmm1
+; SSE2-NEXT:    movd %xmm1, %eax
+; SSE2-NEXT:    movzbl %al, %eax
+; SSE2-NEXT:    retq
+;
+; AVX-LABEL: PR143456:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
+; AVX-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
+; AVX-NEXT:    vpminub %xmm1, %xmm0, %xmm2
+; AVX-NEXT:    vpmaxub %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    vpsubb %xmm2, %xmm0, %xmm0
+; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; AVX-NEXT:    vpsadbw %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    vpextrb $0, %xmm0, %eax
+; AVX-NEXT:    retq
+  %v0 = load <8 x i8>, ptr %p0, align 1
+  %v1 = load <8 x i8>, ptr %p1, align 1
+  %max = tail call <8 x i8> @llvm.umax.v8i8(<8 x i8> %v0, <8 x i8> %v1)
+  %min = tail call <8 x i8> @llvm.umin.v8i8(<8 x i8> %v0, <8 x i8> %v1)
+  %abd = sub nuw <8 x i8> %max, %min
+  %rdx.shuf = shufflevector <8 x i8> %abd, <8 x i8> poison, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 poison, i32 poison, i32 poison, i32 poison>
+  %bin.rdx = add <8 x i8> %abd, %rdx.shuf
+  %rdx.shuf15 = shufflevector <8 x i8> %bin.rdx, <8 x i8> poison, <8 x i32> <i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+  %bin.rdx16 = add <8 x i8> %bin.rdx, %rdx.shuf15
+  %rdx.shuf17 = shufflevector <8 x i8> %bin.rdx16, <8 x i8> poison, <8 x i32> <i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+  %bin.rdx18 = add <8 x i8> %bin.rdx16, %rdx.shuf17
+  %elt = extractelement <8 x i8> %bin.rdx18, i32 0
+  %res = zext i8 %elt to i32
+  ret i32 %res
+}
+declare <8 x i8> @llvm.umax.v8i8(<8 x i8>, <8 x i8>)
+declare <8 x i8> @llvm.umin.v8i8(<8 x i8>, <8 x i8>)
+declare i8 @llvm.vector.reduce.add.v8i8(<8 x i8>)
 
-; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
-declare <16 x i32> @llvm.abs.v16i32(<16 x i32>, i1 immarg) #0
 attributes #0 = { nofree nosync nounwind readnone speculatable willreturn }