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drm/i915/vrr: Drop the extra vmin adjustment for ADL+
Apparently only ICL/TGL need the annoying vmin adjustment. On ADL+ we can program flipline==vmin and the hardware actually respects that properly. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Ankit Nautiyal <[email protected]>
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drivers/gpu/drm/i915/display/intel_vrr.c

Lines changed: 26 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -81,6 +81,19 @@ int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state)
8181
crtc_state->hw.adjusted_mode.crtc_vdisplay;
8282
}
8383

84+
static int intel_vrr_flipline_offset(struct intel_display *display)
85+
{
86+
/* ICL/TGL hardware imposes flipline>=vmin+1 */
87+
return DISPLAY_VER(display) < 13 ? 1 : 0;
88+
}
89+
90+
static int intel_vrr_vmin_flipline(const struct intel_crtc_state *crtc_state)
91+
{
92+
struct intel_display *display = to_intel_display(crtc_state);
93+
94+
return crtc_state->vrr.vmin + intel_vrr_flipline_offset(display);
95+
}
96+
8497
/*
8598
* Without VRR registers get latched at:
8699
* vblank_start
@@ -110,8 +123,8 @@ static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_stat
110123

111124
int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state)
112125
{
113-
/* Min vblank actually determined by flipline that is always >=vmin+1 */
114-
return crtc_state->vrr.vmin + 1;
126+
/* Min vblank actually determined by flipline */
127+
return intel_vrr_vmin_flipline(crtc_state);
115128
}
116129

117130
int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state)
@@ -121,8 +134,8 @@ int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state)
121134

122135
int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state)
123136
{
124-
/* Min vblank actually determined by flipline that is always >=vmin+1 */
125-
return crtc_state->vrr.vmin + 1 - intel_vrr_vblank_exit_length(crtc_state);
137+
/* Min vblank actually determined by flipline */
138+
return intel_vrr_vmin_flipline(crtc_state) - intel_vrr_vblank_exit_length(crtc_state);
126139
}
127140

128141
int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state)
@@ -219,15 +232,17 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
219232
if (vmin >= vmax)
220233
return;
221234

235+
crtc_state->vrr.vmin = vmin;
236+
crtc_state->vrr.vmax = vmax;
237+
238+
crtc_state->vrr.flipline = crtc_state->vrr.vmin;
239+
222240
/*
223241
* flipline determines the min vblank length the hardware will
224-
* generate, and flipline>=vmin+1, hence we reduce vmin by one
225-
* to make sure we can get the actual min vblank length.
242+
* generate, and on ICL/TGL flipline>=vmin+1, hence we reduce
243+
* vmin by one to make sure we can get the actual min vblank length.
226244
*/
227-
crtc_state->vrr.vmin = vmin - 1;
228-
crtc_state->vrr.vmax = vmax;
229-
230-
crtc_state->vrr.flipline = crtc_state->vrr.vmin + 1;
245+
crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display);
231246

232247
/*
233248
* When panel is VRR capable and userspace has
@@ -272,7 +287,7 @@ void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
272287

273288
if (DISPLAY_VER(display) >= 13) {
274289
crtc_state->vrr.guardband =
275-
crtc_state->vrr.vmin + 1 - adjusted_mode->crtc_vblank_start;
290+
crtc_state->vrr.vmin - adjusted_mode->crtc_vblank_start;
276291
} else {
277292
crtc_state->vrr.pipeline_full =
278293
min(255, crtc_state->vrr.vmin - adjusted_mode->crtc_vblank_start -

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