fix: resolve clippy warnings for nightly-2025-07-20

- Elide explicit lifetimes where possible ('a -> '_)
- Add #[must_use] attributes to pure functions
- Add backticks in doc comments for doc_markdown lint
- Use u32::from() instead of 'as u32' for lossless casts
- Use is_multiple_of() instead of modulo comparison
- Add numeric underscores for readability (115200 -> 115_200)
- Remove unused variables in main.rs
- Allow cast_possible_truncation for UART RBR read
- Allow static_mut_refs in test fixtures
- Remove needless continue statements

Author: rusty1968

src/astdebug.rs

@@ -6,7 +6,7 @@ use embedded_io::Write;
 pub fn print_array_u32(uart: &mut UartController<'_>, data: &[u32]) {
     let bytes_per_line = 0x4;
     for (i, dw) in data.iter().enumerate() {
-        if i % bytes_per_line == 0 {
+        if i.is_multiple_of(bytes_per_line) {
             writeln!(uart, "\r").unwrap();
         } else {
             write!(uart, " ").unwrap();
@@ -19,7 +19,7 @@ pub fn print_array_u32(uart: &mut UartController<'_>, data: &[u32]) {
 pub fn print_array_u8(uart: &mut UartController<'_>, data: &[u8]) {
     let bytes_per_line = 0x8;
     for (i, b) in data.iter().enumerate() {
-        if i % bytes_per_line == 0 {
+        if i.is_multiple_of(bytes_per_line) {
             writeln!(uart, "\r").unwrap();
         } else {
             write!(uart, " ").unwrap();
@@ -34,7 +34,7 @@ pub fn print_reg_u8(uart: &mut UartController<'_>, reg_base: usize, size: usize)
     let scu_bytes: &[u8] = unsafe { core::slice::from_raw_parts(reg_base as *const u8, size) };
 
     for (i, b) in scu_bytes.iter().enumerate() {
-        if i % bytes_per_line == 0 {
+        if i.is_multiple_of(bytes_per_line) {
             writeln!(uart, "\r").unwrap();
         } else {
             write!(uart, ", ").unwrap();
@@ -50,7 +50,7 @@ pub fn print_reg_u32(uart: &mut UartController<'_>, reg_base: usize, size: usize
         unsafe { core::slice::from_raw_parts(reg_base as *const u32, size / 4) };
 
     for (i, word) in reg_words.iter().enumerate() {
-        if i % words_per_line == 0 {
+        if i.is_multiple_of(words_per_line) {
             writeln!(uart, "\r\n[{:08x}]:", reg_base + i * 4).unwrap(); // Print base address
         } else {
             write!(uart, ", ").unwrap();

src/common.rs

@@ -97,7 +97,7 @@ impl<'a> UartLogger<'a> {
     }
 }
 
-impl<'a> Logger for UartLogger<'a> {
+impl Logger for UartLogger<'_> {
     fn debug(&mut self, msg: &str) {
         writeln!(self.uart, "{msg}").ok();
         write!(self.uart, "\r").ok();

src/i2c/ast1060_i2c.rs

@@ -1789,7 +1789,7 @@ impl<'a, I2C: Instance, I2CT: I2CTarget, L: Logger> Ast1060I2c<'a, I2C, I2CT, L>
                 match &mut prev_op {
                     Operation::Read(rb) => self.read(addr, rb)?,
                     Operation::Write(wb) => self.write(addr, wb)?,
-                };
+                }
                 prev_op = op;
             }
         }

src/i2c_core/constants.rs

@@ -24,8 +24,8 @@
 //!
 //! - **i2cm18**: Command register - write all command bits here
 //! - **i2cm14**: Status register - read status, write to clear interrupts
-//! - **i2cc08**: Byte data register for byte mode (tx_byte_buffer, rx_byte_buffer)
-//! - **i2cc0c**: Buffer size register for buffer mode (tx_data_byte_count, rx_pool_buffer_size)
+//! - **i2cc08**: Byte data register for byte mode (`tx_byte_buffer`, `rx_byte_buffer`)
+//! - **i2cc0c**: Buffer size register for buffer mode (`tx_data_byte_count`, `rx_pool_buffer_size`)
 
 /// HPLL frequency (1 `GHz`)
 pub const HPLL_FREQ: u32 = 1_000_000_000;
@@ -46,7 +46,7 @@ pub const I2C_FAST_PLUS_MODE_HZ: u32 = 1_000_000;
 pub const BUFFER_MODE_SIZE: usize = 32;
 
 /// I2C buffer size register value
-/// Reference: ast1060_i2c.rs:97
+/// Reference: `ast1060_i2c.rs:97`
 pub const I2C_BUF_SIZE: u8 = 0x20;
 
 /// Default timeout in microseconds

src/i2c_core/global.rs

@@ -47,7 +47,7 @@ use ast1060_pac;
 /// # Reference
 ///
 /// See original implementation in:
-/// - `aspeed-rust/src/i2c/ast1060_i2c.rs:320-360` - Global init with I2CGLOBAL_INIT guard
+/// - `aspeed-rust/src/i2c/ast1060_i2c.rs:320-360` - Global init with `I2CGLOBAL_INIT` guard
 /// - `aspeed-rust/src/i2c/ast1060_i2c.rs:347-360` - Clock divider configuration comments
 ///
 /// # Safety

src/i2c_core/hal_impl.rs

@@ -102,7 +102,7 @@ impl Error for I2cError {
 }
 
 /// Associates the `I2cError` type with `Ast1060I2c` for embedded-hal trait implementations.
-impl<'a> ErrorType for Ast1060I2c<'a> {
+impl ErrorType for Ast1060I2c<'_> {
     type Error = I2cError;
 }
 
@@ -147,7 +147,7 @@ impl<'a> ErrorType for Ast1060I2c<'a> {
 /// i2c.write_read(0x52, &[0xA0], &mut buffer)?;
 /// # Ok::<(), aspeed_ddk::i2c_core::error::I2cError>(())
 /// ```
-impl<'a> I2c<SevenBitAddress> for Ast1060I2c<'a> {
+impl I2c<SevenBitAddress> for Ast1060I2c<'_> {
     /// Writes data to an I2C slave device.
     ///
     /// # Arguments

src/i2c_core/master.rs

@@ -14,22 +14,22 @@
 //!
 //! - **i2cm18** (Master Command Register): All command bits written here
 //!   - Command: `PKT_EN | pkt_addr(addr) | START_CMD | TX/RX_CMD | BUFF_EN | STOP_CMD`
-//!   - Reference: ast1060_i2c.rs:1024 and ast1060_i2c.rs:1107
+//!   - Reference: `ast1060_i2c.rs:1024` and `ast1060_i2c.rs:1107`
 //!
 //! - **i2cc08** (Byte Buffer Register): TX/RX byte data for byte mode
-//!   - `tx_byte_buffer()`: Write byte to transmit (ast1060_i2c.rs:1101)
-//!   - `rx_byte_buffer()`: Read received byte (ast1060_i2c.rs:790)
+//!   - `tx_byte_buffer()`: Write byte to transmit (`ast1060_i2c.rs:1101`)
+//!   - `rx_byte_buffer()`: Read received byte (`ast1060_i2c.rs:790`)
 //!
 //! - **i2cc0c** (Buffer Size Register): Buffer sizes for buffer mode
-//!   - `tx_data_byte_count()`: Set TX count (ast1060_i2c.rs:1089)
-//!   - `rx_pool_buffer_size()`: Set RX size (ast1060_i2c.rs:1011)
+//!   - `tx_data_byte_count()`: Set TX count (`ast1060_i2c.rs:1089`)
+//!   - `rx_pool_buffer_size()`: Set RX size (`ast1060_i2c.rs:1011`)
 //!
 //! - **i2cm14** (Interrupt Status Register): Read status, write-to-clear
-//!   - Reference: ast1060_i2c.rs:849-870 (aspeed_i2c_master_irq)
+//!   - Reference: `ast1060_i2c.rs:849-870` (`aspeed_i2c_master_irq`)
 
 use super::{constants, controller::Ast1060I2c, error::I2cError, types::I2cXferMode};
 
-impl<'a> Ast1060I2c<'a> {
+impl Ast1060I2c<'_> {
     /// Write bytes to an I2C device
     pub fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), I2cError> {
         if bytes.is_empty() {
@@ -193,7 +193,7 @@ impl<'a> Ast1060I2c<'a> {
     /// Uses hardware buffer for efficient multi-byte transfers.
     /// Single transaction model: START+addr on first chunk only,
     /// subsequent chunks continue the transaction without re-addressing.
-    /// Reference: ast1060_i2c.rs do_i2cm_tx() continuation logic
+    /// Reference: `ast1060_i2c.rs` `do_i2cm_tx()` continuation logic
     fn write_buffer_mode(&mut self, addr: u8, bytes: &[u8]) -> Result<(), I2cError> {
         let total_len = bytes.len();
         let mut offset = 0;
@@ -272,7 +272,7 @@ impl<'a> Ast1060I2c<'a> {
     /// Uses hardware buffer for efficient multi-byte transfers.
     /// Single transaction model: START+addr on first chunk only,
     /// subsequent chunks continue the transaction without re-addressing.
-    /// Reference: ast1060_i2c.rs do_i2cm_rx() lines 762-810
+    /// Reference: `ast1060_i2c.rs` `do_i2cm_rx()` lines 762-810
     fn read_buffer_mode(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), I2cError> {
         let total_len = buffer.len();
         let mut offset = 0;

src/i2c_core/recovery.rs

@@ -4,7 +4,7 @@
 
 use super::{constants, controller::Ast1060I2c, error::I2cError};
 
-impl<'a> Ast1060I2c<'a> {
+impl Ast1060I2c<'_> {
     /// Recover the I2C bus from stuck condition
     pub fn recover_bus(&mut self) -> Result<(), I2cError> {
         // Disable master and slave functionality

src/i2c_core/slave.rs

@@ -112,7 +112,7 @@ impl SlaveBuffer {
     }
 }
 
-impl<'a> Ast1060I2c<'a> {
+impl Ast1060I2c<'_> {
     /// Configure the controller for slave mode
     pub fn configure_slave(&mut self, config: &SlaveConfig) -> Result<(), I2cError> {
         // Ensure master mode is disabled first
@@ -269,6 +269,7 @@ impl<'a> Ast1060I2c<'a> {
             self.copy_to_buffer(&data[..to_write])?;
 
             // Set transfer length
+            #[allow(clippy::cast_possible_truncation)]
             self.regs()
                 .i2cc0c()
                 .write(|w| unsafe { w.tx_data_byte_count().bits(to_write as u8 - 1) });
@@ -296,6 +297,7 @@ impl<'a> Ast1060I2c<'a> {
     }
 
     /// Handle slave mode interrupt
+    #[allow(clippy::too_many_lines)]
     pub fn handle_slave_interrupt(&mut self) -> Option<SlaveEvent> {
         let status = self.regs().i2cs24().read().bits();
 
@@ -413,15 +415,15 @@ impl<'a> Ast1060I2c<'a> {
             }
         } else {
             //byte irq
-            let mut cmd: u32 = constants::AST_I2CS_ACTIVE_ALL;
+            let cmd: u32 = constants::AST_I2CS_ACTIVE_ALL;
 
             if status
                 == constants::AST_I2CS_SLAVE_MATCH
                     | constants::AST_I2CS_RX_DONE
                     | constants::AST_I2CS_WAIT_RX_DMA
             {
                 // S: Sw|D
-                let byte_data = self.regs().i2cc08().read().rx_byte_buffer().bits();
+                let _byte_data = self.regs().i2cc08().read().rx_byte_buffer().bits();
                 self.regs().i2cs28().write(|w| unsafe { w.bits(cmd) });
                 self.regs().i2cs24().write(|w| unsafe { w.bits(status) });
                 self.regs().i2cs24().read().bits();
@@ -439,7 +441,7 @@ impl<'a> Ast1060I2c<'a> {
                         | constants::AST_I2CS_STOP
             {
                 // S: Sw|D|P
-                let byte_data = self.regs().i2cc08().read().rx_byte_buffer().bits();
+                let _byte_data = self.regs().i2cc08().read().rx_byte_buffer().bits();
                 self.regs().i2cs28().write(|w| unsafe { w.bits(cmd) });
                 self.regs().i2cs24().write(|w| unsafe { w.bits(status) });
                 return Some(SlaveEvent::WriteRequest);
@@ -453,7 +455,7 @@ impl<'a> Ast1060I2c<'a> {
             {
                 // S: Sr|D
                 // received one byte
-                let byte_data = self.regs().i2cc08().read().rx_byte_buffer().bits();
+                let _byte_data = self.regs().i2cc08().read().rx_byte_buffer().bits();
                 return Some(SlaveEvent::DataSent { len: 1 });
             } else if status == constants::AST_I2CS_TX_ACK | constants::AST_I2CS_WAIT_TX_DMA {
                 // S: tD
@@ -474,9 +476,8 @@ impl<'a> Ast1060I2c<'a> {
                 self.regs().i2cs28().write(|w| unsafe { w.bits(cmd) });
                 self.regs().i2cs24().write(|w| unsafe { w.bits(status) });
                 return Some(SlaveEvent::Stop);
-            } else {
-                // TODO byte slave sts
             }
+            // TODO byte slave sts
         }
         None
     }

src/i2c_core/transfer.rs

@@ -9,7 +9,7 @@
 use super::{constants, controller::Ast1060I2c, error::I2cError, types::I2cXferMode};
 
 #[allow(dead_code)]
-impl<'a> Ast1060I2c<'a> {
+impl Ast1060I2c<'_> {
     /// Start a transfer (common setup for byte/buffer modes)
     ///
     /// Note: Currently unused - byte/buffer mode functions in master.rs