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Merge pull request riscv-collab#1202 from JanMatCodasip/fix-datatypes-around-batch
Fix data types around batch.{c,h}
2 parents 77b8575 + a450a7d commit 57b58b7

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5 files changed

+124
-64
lines changed

5 files changed

+124
-64
lines changed

‎src/target/riscv/batch.c‎

Lines changed: 62 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -10,13 +10,24 @@
1010
#include "riscv.h"
1111
#include "field_helpers.h"
1212

13+
// TODO: DTM_DMI_MAX_ADDRESS_LENGTH should be reduced to 32 (per the debug spec)
1314
#define DTM_DMI_MAX_ADDRESS_LENGTH ((1<<DTM_DTMCS_ABITS_LENGTH)-1)
1415
#define DMI_SCAN_MAX_BIT_LENGTH (DTM_DMI_MAX_ADDRESS_LENGTH + DTM_DMI_DATA_LENGTH + DTM_DMI_OP_LENGTH)
16+
1517
#define DMI_SCAN_BUF_SIZE (DIV_ROUND_UP(DMI_SCAN_MAX_BIT_LENGTH, 8))
1618

1719
/* Reserve extra room in the batch (needed for the last NOP operation) */
1820
#define BATCH_RESERVED_SCANS 1
1921

22+
static unsigned int get_dmi_scan_length(const struct target *target)
23+
{
24+
const unsigned int abits = riscv_get_dmi_address_bits(target);
25+
assert(abits > 0);
26+
assert(abits <= DTM_DMI_MAX_ADDRESS_LENGTH);
27+
28+
return abits + DTM_DMI_DATA_LENGTH + DTM_DMI_OP_LENGTH;
29+
}
30+
2031
struct riscv_batch *riscv_batch_alloc(struct target *target, size_t scans)
2132
{
2233
scans += BATCH_RESERVED_SCANS;
@@ -127,11 +138,10 @@ static void add_idle_before_batch(const struct riscv_batch *batch, size_t start_
127138
const unsigned int idle_change = new_delay - batch->last_scan_delay;
128139
LOG_TARGET_DEBUG(batch->target, "Adding %u idle cycles before the batch.",
129140
idle_change);
130-
assert(idle_change <= INT_MAX);
131141
jtag_add_runtest(idle_change, TAP_IDLE);
132142
}
133143

134-
static int get_delay(const struct riscv_batch *batch, size_t scan_idx,
144+
static unsigned int get_delay(const struct riscv_batch *batch, size_t scan_idx,
135145
const struct riscv_scan_delays *delays, bool resets_delays,
136146
size_t reset_delays_after)
137147
{
@@ -142,7 +152,6 @@ static int get_delay(const struct riscv_batch *batch, size_t scan_idx,
142152
const enum riscv_scan_delay_class delay_class =
143153
batch->delay_classes[scan_idx];
144154
const unsigned int delay = riscv_scan_get_delay(delays, delay_class);
145-
assert(delay <= INT_MAX);
146155
return delays_were_reset ? 0 : delay;
147156
}
148157

@@ -198,10 +207,7 @@ static void log_batch(const struct riscv_batch *batch, size_t start_idx,
198207
if (debug_level < LOG_LVL_DEBUG)
199208
return;
200209

201-
const unsigned int scan_bits = batch->fields->num_bits;
202-
assert(scan_bits == (unsigned int)riscv_get_dmi_scan_length(batch->target));
203-
const unsigned int abits = scan_bits - DTM_DMI_OP_LENGTH
204-
- DTM_DMI_DATA_LENGTH;
210+
const unsigned int abits = riscv_get_dmi_address_bits(batch->target);
205211

206212
/* Determine the "op" and "address" of the scan that preceded the first
207213
* executed scan.
@@ -211,7 +217,7 @@ static void log_batch(const struct riscv_batch *batch, size_t start_idx,
211217
* would be a more robust solution.
212218
*/
213219
bool last_scan_was_read = false;
214-
uint32_t last_scan_address = -1 /* to silence maybe-uninitialized */;
220+
uint32_t last_scan_address = (uint32_t)(-1) /* to silence maybe-uninitialized */;
215221
if (start_idx > 0) {
216222
const struct scan_field * const field = &batch->fields[start_idx - 1];
217223
assert(field->out_value);
@@ -224,7 +230,7 @@ static void log_batch(const struct riscv_batch *batch, size_t start_idx,
224230
/* Decode and log every executed scan */
225231
for (size_t i = start_idx; i < batch->used_scans; ++i) {
226232
static const char * const op_string[] = {"-", "r", "w", "?"};
227-
const int delay = get_delay(batch, i, delays, resets_delays,
233+
const unsigned int delay = get_delay(batch, i, delays, resets_delays,
228234
reset_delays_after);
229235
const struct scan_field * const field = &batch->fields[i];
230236

@@ -247,15 +253,15 @@ static void log_batch(const struct riscv_batch *batch, size_t start_idx,
247253
DTM_DMI_ADDRESS_OFFSET, abits);
248254

249255
LOG_DEBUG("%db %s %08" PRIx32 " @%02" PRIx32
250-
" -> %s %08" PRIx32 " @%02" PRIx32 "; %di",
256+
" -> %s %08" PRIx32 " @%02" PRIx32 "; %ui",
251257
field->num_bits, op_string[out_op], out_data, out_address,
252258
status_string[in_op], in_data, in_address, delay);
253259

254260
if (last_scan_was_read && in_op == DTM_DMI_OP_SUCCESS)
255261
log_dmi_decoded(batch, /*write*/ false,
256262
last_scan_address, in_data);
257263
} else {
258-
LOG_DEBUG("%db %s %08" PRIx32 " @%02" PRIx32 " -> ?; %di",
264+
LOG_DEBUG("%db %s %08" PRIx32 " @%02" PRIx32 " -> ?; %ui",
259265
field->num_bits, op_string[out_op], out_data, out_address,
260266
delay);
261267
}
@@ -321,35 +327,56 @@ int riscv_batch_run_from(struct riscv_batch *batch, size_t start_idx,
321327
return ERROR_OK;
322328
}
323329

324-
void riscv_batch_add_dmi_write(struct riscv_batch *batch, uint64_t address, uint32_t data,
330+
void riscv_batch_add_dmi_write(struct riscv_batch *batch, uint32_t address, uint32_t data,
325331
bool read_back, enum riscv_scan_delay_class delay_class)
326332
{
333+
// TODO: Check that the bit width of "address" is no more than dtmcs.abits,
334+
// otherwise return an error (during batch creation or when the batch is executed).
335+
327336
assert(batch->used_scans < batch->allocated_scans);
328337
struct scan_field *field = batch->fields + batch->used_scans;
329-
field->num_bits = riscv_get_dmi_scan_length(batch->target);
330-
field->out_value = (void *)(batch->data_out + batch->used_scans * DMI_SCAN_BUF_SIZE);
331-
riscv_fill_dmi_write(batch->target, (char *)field->out_value, address, data);
338+
339+
field->num_bits = get_dmi_scan_length(batch->target);
340+
assert(field->num_bits <= DMI_SCAN_MAX_BIT_LENGTH);
341+
342+
uint8_t *out_value = batch->data_out + batch->used_scans * DMI_SCAN_BUF_SIZE;
343+
uint8_t *in_value = batch->data_in + batch->used_scans * DMI_SCAN_BUF_SIZE;
344+
345+
field->out_value = out_value;
346+
riscv_fill_dmi_write(batch->target, out_value, address, data);
347+
332348
if (read_back) {
333-
field->in_value = (void *)(batch->data_in + batch->used_scans * DMI_SCAN_BUF_SIZE);
334-
riscv_fill_dm_nop(batch->target, (char *)field->in_value);
349+
field->in_value = in_value;
350+
riscv_fill_dm_nop(batch->target, in_value);
335351
} else {
336352
field->in_value = NULL;
337353
}
354+
338355
batch->delay_classes[batch->used_scans] = delay_class;
339356
batch->last_scan = RISCV_SCAN_TYPE_WRITE;
340357
batch->used_scans++;
341358
}
342359

343-
size_t riscv_batch_add_dmi_read(struct riscv_batch *batch, uint64_t address,
360+
size_t riscv_batch_add_dmi_read(struct riscv_batch *batch, uint32_t address,
344361
enum riscv_scan_delay_class delay_class)
345362
{
363+
// TODO: Check that the bit width of "address" is no more than dtmcs.abits,
364+
// otherwise return an error (during batch creation or when the batch is executed).
365+
346366
assert(batch->used_scans < batch->allocated_scans);
347367
struct scan_field *field = batch->fields + batch->used_scans;
348-
field->num_bits = riscv_get_dmi_scan_length(batch->target);
349-
field->out_value = (void *)(batch->data_out + batch->used_scans * DMI_SCAN_BUF_SIZE);
350-
field->in_value = (void *)(batch->data_in + batch->used_scans * DMI_SCAN_BUF_SIZE);
351-
riscv_fill_dmi_read(batch->target, (char *)field->out_value, address);
352-
riscv_fill_dm_nop(batch->target, (char *)field->in_value);
368+
369+
field->num_bits = get_dmi_scan_length(batch->target);
370+
assert(field->num_bits <= DMI_SCAN_MAX_BIT_LENGTH);
371+
372+
uint8_t *out_value = batch->data_out + batch->used_scans * DMI_SCAN_BUF_SIZE;
373+
uint8_t *in_value = batch->data_in + batch->used_scans * DMI_SCAN_BUF_SIZE;
374+
375+
field->out_value = out_value;
376+
field->in_value = in_value;
377+
riscv_fill_dmi_read(batch->target, out_value, address);
378+
riscv_fill_dm_nop(batch->target, in_value);
379+
353380
batch->delay_classes[batch->used_scans] = delay_class;
354381
batch->last_scan = RISCV_SCAN_TYPE_READ;
355382
batch->used_scans++;
@@ -382,11 +409,18 @@ void riscv_batch_add_nop(struct riscv_batch *batch)
382409
{
383410
assert(batch->used_scans < batch->allocated_scans);
384411
struct scan_field *field = batch->fields + batch->used_scans;
385-
field->num_bits = riscv_get_dmi_scan_length(batch->target);
386-
field->out_value = (void *)(batch->data_out + batch->used_scans * DMI_SCAN_BUF_SIZE);
387-
field->in_value = (void *)(batch->data_in + batch->used_scans * DMI_SCAN_BUF_SIZE);
388-
riscv_fill_dm_nop(batch->target, (char *)field->out_value);
389-
riscv_fill_dm_nop(batch->target, (char *)field->in_value);
412+
413+
field->num_bits = get_dmi_scan_length(batch->target);
414+
assert(field->num_bits <= DMI_SCAN_MAX_BIT_LENGTH);
415+
416+
uint8_t *out_value = batch->data_out + batch->used_scans * DMI_SCAN_BUF_SIZE;
417+
uint8_t *in_value = batch->data_in + batch->used_scans * DMI_SCAN_BUF_SIZE;
418+
419+
field->out_value = out_value;
420+
field->in_value = in_value;
421+
riscv_fill_dm_nop(batch->target, out_value);
422+
riscv_fill_dm_nop(batch->target, in_value);
423+
390424
/* DMI NOP never triggers any debug module operation,
391425
* so the shortest (base) delay can be used. */
392426
batch->delay_classes[batch->used_scans] = RISCV_DELAY_BASE;

‎src/target/riscv/batch.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -190,11 +190,11 @@ int riscv_batch_run_from(struct riscv_batch *batch, size_t start_idx,
190190
size_t riscv_batch_finished_scans(const struct riscv_batch *batch);
191191

192192
/* Adds a DM register write to this batch. */
193-
void riscv_batch_add_dmi_write(struct riscv_batch *batch, uint64_t address, uint32_t data,
193+
void riscv_batch_add_dmi_write(struct riscv_batch *batch, uint32_t address, uint32_t data,
194194
bool read_back, enum riscv_scan_delay_class delay_class);
195195

196196
static inline void
197-
riscv_batch_add_dm_write(struct riscv_batch *batch, uint64_t address, uint32_t data,
197+
riscv_batch_add_dm_write(struct riscv_batch *batch, uint32_t address, uint32_t data,
198198
bool read_back, enum riscv_scan_delay_class delay_type)
199199
{
200200
return riscv_batch_add_dmi_write(batch,
@@ -205,11 +205,11 @@ riscv_batch_add_dm_write(struct riscv_batch *batch, uint64_t address, uint32_t d
205205
/* DM register reads must be handled in two parts: the first one schedules a read and
206206
* provides a key, the second one actually obtains the result of the read -
207207
* status (op) and the actual data. */
208-
size_t riscv_batch_add_dmi_read(struct riscv_batch *batch, uint64_t address,
208+
size_t riscv_batch_add_dmi_read(struct riscv_batch *batch, uint32_t address,
209209
enum riscv_scan_delay_class delay_class);
210210

211211
static inline size_t
212-
riscv_batch_add_dm_read(struct riscv_batch *batch, uint64_t address,
212+
riscv_batch_add_dm_read(struct riscv_batch *batch, uint32_t address,
213213
enum riscv_scan_delay_class delay_type)
214214
{
215215
return riscv_batch_add_dmi_read(batch,

‎src/target/riscv/riscv-013.c‎

Lines changed: 42 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -56,10 +56,10 @@ static riscv_insn_t riscv013_read_progbuf(struct target *target, unsigned int
5656
index);
5757
static int riscv013_invalidate_cached_progbuf(struct target *target);
5858
static int riscv013_execute_progbuf(struct target *target, uint32_t *cmderr);
59-
static void riscv013_fill_dmi_write(struct target *target, char *buf, uint64_t a, uint32_t d);
60-
static void riscv013_fill_dmi_read(struct target *target, char *buf, uint64_t a);
61-
static int riscv013_get_dmi_scan_length(struct target *target);
62-
static void riscv013_fill_dm_nop(struct target *target, char *buf);
59+
static void riscv013_fill_dmi_write(const struct target *target, uint8_t *buf, uint32_t a, uint32_t d);
60+
static void riscv013_fill_dmi_read(const struct target *target, uint8_t *buf, uint32_t a);
61+
static unsigned int riscv013_get_dmi_address_bits(const struct target *target);
62+
static void riscv013_fill_dm_nop(const struct target *target, uint8_t *buf);
6363
static unsigned int register_size(struct target *target, enum gdb_regno number);
6464
static int register_read_direct(struct target *target, riscv_reg_t *value,
6565
enum gdb_regno number);
@@ -1950,6 +1950,29 @@ static int examine(struct target *target)
19501950
info->abits = get_field(dtmcontrol, DTM_DTMCS_ABITS);
19511951
info->dtmcs_idle = get_field(dtmcontrol, DTM_DTMCS_IDLE);
19521952

1953+
if (info->abits > RISCV013_DTMCS_ABITS_MAX) {
1954+
/* Max. address width given by the debug specification is exceeded */
1955+
LOG_TARGET_ERROR(target, "The target's debug bus (DMI) address width exceeds "
1956+
"the maximum:");
1957+
LOG_TARGET_ERROR(target, " found dtmcs.abits = %d; maximum is abits = %d.",
1958+
info->abits, RISCV013_DTMCS_ABITS_MAX);
1959+
return ERROR_FAIL;
1960+
}
1961+
1962+
if (info->abits < RISCV013_DTMCS_ABITS_MIN) {
1963+
/* The requirement for minimum DMI address width of 7 bits is part of
1964+
* the RISC-V Debug spec since Jan-20-2017 (commit 03df6ee7). However,
1965+
* implementations exist that implement narrower DMI address. For example
1966+
* Spike as of Q1/2025 uses dmi.abits = 6.
1967+
*
1968+
* For that reason, warn the user but continue.
1969+
*/
1970+
LOG_TARGET_WARNING(target, "The target's debug bus (DMI) address width is "
1971+
"lower than the minimum:");
1972+
LOG_TARGET_WARNING(target, " found dtmcs.abits = %d; minimum is abits = %d.",
1973+
info->abits, RISCV013_DTMCS_ABITS_MIN);
1974+
}
1975+
19531976
if (!check_dbgbase_exists(target)) {
19541977
LOG_TARGET_ERROR(target, "Could not find debug module with DMI base address (dbgbase) = 0x%x", target->dbgbase);
19551978
return ERROR_FAIL;
@@ -2780,7 +2803,7 @@ static int init_target(struct command_context *cmd_ctx,
27802803
generic_info->fill_dmi_write = &riscv013_fill_dmi_write;
27812804
generic_info->fill_dmi_read = &riscv013_fill_dmi_read;
27822805
generic_info->fill_dm_nop = &riscv013_fill_dm_nop;
2783-
generic_info->get_dmi_scan_length = &riscv013_get_dmi_scan_length;
2806+
generic_info->get_dmi_address_bits = &riscv013_get_dmi_address_bits;
27842807
generic_info->authdata_read = &riscv013_authdata_read;
27852808
generic_info->authdata_write = &riscv013_authdata_write;
27862809
generic_info->dmi_read = &dmi_read;
@@ -5402,34 +5425,34 @@ static int riscv013_execute_progbuf(struct target *target, uint32_t *cmderr)
54025425
return riscv013_execute_abstract_command(target, run_program, cmderr);
54035426
}
54045427

5405-
static void riscv013_fill_dmi_write(struct target *target, char *buf, uint64_t a, uint32_t d)
5428+
static void riscv013_fill_dmi_write(const struct target *target, uint8_t *buf, uint32_t a, uint32_t d)
54065429
{
54075430
RISCV013_INFO(info);
5408-
buf_set_u64((unsigned char *)buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_WRITE);
5409-
buf_set_u64((unsigned char *)buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, d);
5410-
buf_set_u64((unsigned char *)buf, DTM_DMI_ADDRESS_OFFSET, info->abits, a);
5431+
buf_set_u32(buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_WRITE);
5432+
buf_set_u32(buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, d);
5433+
buf_set_u32(buf, DTM_DMI_ADDRESS_OFFSET, info->abits, a);
54115434
}
54125435

5413-
static void riscv013_fill_dmi_read(struct target *target, char *buf, uint64_t a)
5436+
static void riscv013_fill_dmi_read(const struct target *target, uint8_t *buf, uint32_t a)
54145437
{
54155438
RISCV013_INFO(info);
5416-
buf_set_u64((unsigned char *)buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_READ);
5417-
buf_set_u64((unsigned char *)buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, 0);
5418-
buf_set_u64((unsigned char *)buf, DTM_DMI_ADDRESS_OFFSET, info->abits, a);
5439+
buf_set_u32(buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_READ);
5440+
buf_set_u32(buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, 0);
5441+
buf_set_u32(buf, DTM_DMI_ADDRESS_OFFSET, info->abits, a);
54195442
}
54205443

5421-
static void riscv013_fill_dm_nop(struct target *target, char *buf)
5444+
static void riscv013_fill_dm_nop(const struct target *target, uint8_t *buf)
54225445
{
54235446
RISCV013_INFO(info);
5424-
buf_set_u64((unsigned char *)buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_NOP);
5425-
buf_set_u64((unsigned char *)buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, 0);
5426-
buf_set_u64((unsigned char *)buf, DTM_DMI_ADDRESS_OFFSET, info->abits, 0);
5447+
buf_set_u32(buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_NOP);
5448+
buf_set_u32(buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, 0);
5449+
buf_set_u32(buf, DTM_DMI_ADDRESS_OFFSET, info->abits, 0);
54275450
}
54285451

5429-
static int riscv013_get_dmi_scan_length(struct target *target)
5452+
static unsigned int riscv013_get_dmi_address_bits(const struct target *target)
54305453
{
54315454
RISCV013_INFO(info);
5432-
return info->abits + DTM_DMI_DATA_LENGTH + DTM_DMI_OP_LENGTH;
5455+
return info->abits;
54335456
}
54345457

54355458
/* Helper Functions. */

‎src/target/riscv/riscv.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -6076,28 +6076,28 @@ int riscv_execute_progbuf(struct target *target, uint32_t *cmderr)
60766076
return r->execute_progbuf(target, cmderr);
60776077
}
60786078

6079-
void riscv_fill_dmi_write(struct target *target, char *buf, uint64_t a, uint32_t d)
6079+
void riscv_fill_dmi_write(const struct target *target, uint8_t *buf, uint32_t a, uint32_t d)
60806080
{
60816081
RISCV_INFO(r);
60826082
r->fill_dmi_write(target, buf, a, d);
60836083
}
60846084

6085-
void riscv_fill_dmi_read(struct target *target, char *buf, uint64_t a)
6085+
void riscv_fill_dmi_read(const struct target *target, uint8_t *buf, uint32_t a)
60866086
{
60876087
RISCV_INFO(r);
60886088
r->fill_dmi_read(target, buf, a);
60896089
}
60906090

6091-
void riscv_fill_dm_nop(struct target *target, char *buf)
6091+
void riscv_fill_dm_nop(const struct target *target, uint8_t *buf)
60926092
{
60936093
RISCV_INFO(r);
60946094
r->fill_dm_nop(target, buf);
60956095
}
60966096

6097-
int riscv_get_dmi_scan_length(struct target *target)
6097+
unsigned int riscv_get_dmi_address_bits(const struct target *target)
60986098
{
60996099
RISCV_INFO(r);
6100-
return r->get_dmi_scan_length(target);
6100+
return r->get_dmi_address_bits(target);
61016101
}
61026102

61036103
static int check_if_trigger_exists(struct target *target, unsigned int index)

‎src/target/riscv/riscv.h‎

Lines changed: 11 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -125,6 +125,9 @@ typedef struct {
125125
#define DTM_DTMCS_VERSION_UNKNOWN ((unsigned int)-1)
126126
#define RISCV_TINFO_VERSION_UNKNOWN (-1)
127127

128+
#define RISCV013_DTMCS_ABITS_MIN 7
129+
#define RISCV013_DTMCS_ABITS_MAX 32
130+
128131
struct reg_name_table {
129132
unsigned int num_entries;
130133
char **reg_names;
@@ -275,10 +278,10 @@ struct riscv_info {
275278
riscv_insn_t (*read_progbuf)(struct target *target, unsigned int index);
276279
int (*execute_progbuf)(struct target *target, uint32_t *cmderr);
277280
int (*invalidate_cached_progbuf)(struct target *target);
278-
int (*get_dmi_scan_length)(struct target *target);
279-
void (*fill_dmi_write)(struct target *target, char *buf, uint64_t a, uint32_t d);
280-
void (*fill_dmi_read)(struct target *target, char *buf, uint64_t a);
281-
void (*fill_dm_nop)(struct target *target, char *buf);
281+
unsigned int (*get_dmi_address_bits)(const struct target *target);
282+
void (*fill_dmi_write)(const struct target *target, uint8_t *buf, uint32_t a, uint32_t d);
283+
void (*fill_dmi_read)(const struct target *target, uint8_t *buf, uint32_t a);
284+
void (*fill_dm_nop)(const struct target *target, uint8_t *buf);
282285

283286
int (*authdata_read)(struct target *target, uint32_t *value, unsigned int index);
284287
int (*authdata_write)(struct target *target, uint32_t value, unsigned int index);
@@ -478,10 +481,10 @@ riscv_insn_t riscv_read_progbuf(struct target *target, int index);
478481
int riscv_write_progbuf(struct target *target, int index, riscv_insn_t insn);
479482
int riscv_execute_progbuf(struct target *target, uint32_t *cmderr);
480483

481-
void riscv_fill_dm_nop(struct target *target, char *buf);
482-
void riscv_fill_dmi_write(struct target *target, char *buf, uint64_t a, uint32_t d);
483-
void riscv_fill_dmi_read(struct target *target, char *buf, uint64_t a);
484-
int riscv_get_dmi_scan_length(struct target *target);
484+
void riscv_fill_dm_nop(const struct target *target, uint8_t *buf);
485+
void riscv_fill_dmi_write(const struct target *target, uint8_t *buf, uint32_t a, uint32_t d);
486+
void riscv_fill_dmi_read(const struct target *target, uint8_t *buf, uint32_t a);
487+
unsigned int riscv_get_dmi_address_bits(const struct target *target);
485488

486489
uint32_t riscv_get_dmi_address(const struct target *target, uint32_t dm_address);
487490

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