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alignment of firmware code
1 parent 7a7d652 commit 4bd0246

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14 files changed

+183
-162
lines changed

14 files changed

+183
-162
lines changed

m5stack/libs/driver/bh1750.py

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,6 @@ class Power:
1313

1414

1515
class BH1750:
16-
1716
CONTINUOUSLY = 0b00010000
1817
ONE_TIME = 0b00100000
1918

m5stack/libs/driver/button.py

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,6 @@
1313

1414

1515
class Button:
16-
1716
NO_ACTIVE = 0
1817
HOLD = 1
1918
PRESSED = 2

m5stack/libs/driver/ir/transmitter.py

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,7 @@
2727
# Shared by NEC
2828
STOP = const(0) # End of data
2929

30+
3031
# IR abstract base class. Array holds periods in μs between toggling 36/38KHz
3132
# carrier on or off. Physical transmission occurs in an ISR context controlled
3233
# by timer 2 and timer 5. See TRANSMITTER.md for details of operation.

m5stack/libs/driver/sh1107.py

Lines changed: 38 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -38,10 +38,11 @@ def __init__(self, width, height, external_vcc):
3838
self.pages = self.height // 8
3939
self.line_bytes = self.width // 8
4040
size = self.width * self.height // 8
41-
self.curr_buffer = bytearray(b'\x00' * size) # self.fill(0)
42-
self.prev_buffer = bytearray(b'\xff' * size) # force full refresh
43-
super().__init__(self.curr_buffer, self.width, self.height,
44-
MONO_VLSB if self.page_mode else MONO_HMSB)
41+
self.curr_buffer = bytearray(b"\x00" * size) # self.fill(0)
42+
self.prev_buffer = bytearray(b"\xff" * size) # force full refresh
43+
super().__init__(
44+
self.curr_buffer, self.width, self.height, MONO_VLSB if self.page_mode else MONO_HMSB
45+
)
4546
self.init_display()
4647
self.fill(0)
4748
self.show()
@@ -58,22 +59,30 @@ def init_display(self):
5859
# 0x00 = page, 0x01 = vertical
5960
SET_MEM_MODE | (0x00 if self.page_mode else 0x01),
6061
# resolution and layout
61-
SET_DISP_START_LINE, 0x00,
62+
SET_DISP_START_LINE,
63+
0x00,
6264
SET_SEG_REMAP | 0x00, # 0x01 rotate 180 deg
6365
# 0x08 rotate 180 deg
6466
SET_COM_OUT_DIR | (0x00 if self.page_mode else 0x08),
65-
SET_MUX_RATIO, 0x7f, # always this?
67+
SET_MUX_RATIO,
68+
0x7F, # always this?
6669
# offseted for 64 x 128 (Aliexpress 0.96")
67-
SET_DISP_OFFSET, 0x60 if self.width != self.height else 0x00,
70+
SET_DISP_OFFSET,
71+
0x60 if self.width != self.height else 0x00,
6872
# timing and driving scheme
69-
SET_DISP_CLK_DIV, 0x50,
70-
SET_PRECHARGE, 0x22 if self.external_vcc else 0xf1,
71-
SET_VCOM_DESEL, 0x35, # 0.77 * Vcc
72-
SET_DCDC_MODE, 0x81, # on, 0.6 * switch freq
73+
SET_DISP_CLK_DIV,
74+
0x50,
75+
SET_PRECHARGE,
76+
0x22 if self.external_vcc else 0xF1,
77+
SET_VCOM_DESEL,
78+
0x35, # 0.77 * Vcc
79+
SET_DCDC_MODE,
80+
0x81, # on, 0.6 * switch freq
7381
# display
74-
SET_CONTRAST, 0x80, # very low to avoid uneven background
82+
SET_CONTRAST,
83+
0x80, # very low to avoid uneven background
7584
SET_ENTIRE_ON | 0x00, # output follows RAM contents, not entire on
76-
SET_NORM_INV | 0x00 # 0x00 = not inverted, 0x01 = inverted
85+
SET_NORM_INV | 0x00, # 0x00 = not inverted, 0x01 = inverted
7786
):
7887
self.write_cmd(cmd)
7988
# buffers are initialized as if self.fill(0) was called
@@ -94,7 +103,7 @@ def invert(self, invert):
94103
self.write_cmd(SET_NORM_INV | (invert & 1))
95104

96105
def image(self, x, y, filename):
97-
with open(filename, 'rb') as f:
106+
with open(filename, "rb") as f:
98107
f.readline()
99108
f.readline()
100109
width, height = [int(v) for v in f.readline().split()]
@@ -115,34 +124,42 @@ def show_page_mode(self):
115124
for col1, col2 in self.test_modified(noffs, self.width):
116125
c = col1 - noffs
117126
self.write_cmd(SET_PAGE_ADDR | page)
118-
self.write_cmd(SET_COL_LO_ADDR | (c & 0x0f))
127+
self.write_cmd(SET_COL_LO_ADDR | (c & 0x0F))
119128
self.write_cmd(SET_COL_HI_ADDR | ((c & 0x70) >> 4))
120-
self.write_data(self.curr_buffer[col1: col2])
129+
self.write_data(self.curr_buffer[col1:col2])
121130
# print('Write offsets {} : {}, col: {}'.format(col1, col2, c))
122131

123132
def show_vert_mode(self):
124133
for col in range(self.height):
125134
noffs = col * self.line_bytes
126135
for page1, page2 in self.test_modified(noffs, self.line_bytes):
127136
self.write_cmd(SET_PAGE_ADDR | (page1 - noffs))
128-
self.write_cmd(SET_COL_LO_ADDR | (col & 0x0f))
137+
self.write_cmd(SET_COL_LO_ADDR | (col & 0x0F))
129138
self.write_cmd(SET_COL_HI_ADDR | ((col & 0x70) >> 4))
130-
self.write_data(self.curr_buffer[page1: page2])
139+
self.write_data(self.curr_buffer[page1:page2])
131140
# print('Write offsets {} : {}, page: {}'.format(page1, page2, page1 - noffs))
132141

133142
def test_modified(self, offs, width):
134143
ptr = offs
135144
width += offs
136145
while ptr < width:
137146
# skip unmodified chunks
138-
while ptr < width and self.curr_buffer[ptr: ptr + TEST_CHUNK] == self.prev_buffer[ptr: ptr + TEST_CHUNK]:
147+
while (
148+
ptr < width
149+
and self.curr_buffer[ptr : ptr + TEST_CHUNK]
150+
== self.prev_buffer[ptr : ptr + TEST_CHUNK]
151+
):
139152
ptr += TEST_CHUNK
140153

141154
if ptr < width:
142155
first = ptr
143156
ptr += TEST_CHUNK
144157
# find modified chunks
145-
while ptr < width and self.curr_buffer[ptr:ptr + TEST_CHUNK] != self.prev_buffer[ptr:ptr + TEST_CHUNK]:
158+
while (
159+
ptr < width
160+
and self.curr_buffer[ptr : ptr + TEST_CHUNK]
161+
!= self.prev_buffer[ptr : ptr + TEST_CHUNK]
162+
):
146163
ptr += TEST_CHUNK
147164

148165
yield first, ptr
@@ -154,7 +171,7 @@ def __init__(self, width, height, i2c, addr=0x3C, external_vcc=False):
154171
self.i2c = i2c
155172
self.i2c_addr = addr
156173
self.temp = bytearray(2)
157-
self.write_list = [b'\x40', None] # Co=0, D/C#=1
174+
self.write_list = [b"\x40", None] # Co=0, D/C#=1
158175
super().__init__(width, height, external_vcc)
159176

160177
def write_cmd(self, cmd):

m5stack/libs/driver/sht4x.py

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -131,17 +131,15 @@ def measure(self) -> Tuple[float, float]:
131131
self.i2c_device.writeto(self.sht4x_i2c_addr, bytearray([command]))
132132
time.sleep(Mode.delay[self._mode])
133133
self._buffer = self.i2c_device.readfrom(self.sht4x_i2c_addr, 6)
134-
134+
135135
# separate the read data
136136
temp_data = self._buffer[0:2]
137137
temp_crc = self._buffer[2]
138138
humidity_data = self._buffer[3:5]
139139
humidity_crc = self._buffer[5]
140140

141141
# check CRC of bytes
142-
if temp_crc != self._crc8(temp_data) or humidity_crc != self._crc8(
143-
humidity_data
144-
):
142+
if temp_crc != self._crc8(temp_data) or humidity_crc != self._crc8(humidity_data):
145143
raise RuntimeError("Invalid CRC calculated")
146144

147145
# decode data into human values:
@@ -172,4 +170,4 @@ def _crc8(buffer) -> int:
172170
crc = (crc << 1) ^ 0x31
173171
else:
174172
crc = crc << 1
175-
return crc & 0xFF # return the bottom 8 bits
173+
return crc & 0xFF # return the bottom 8 bits

m5stack/libs/unit/hbridge.py

Lines changed: 37 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -12,15 +12,16 @@
1212

1313
HBRIDGE_ADDR = 0x20
1414

15-
DIRECTION_REG = 0x00
16-
PWM8BIT_REG = 0x01
17-
PWM16BIT_REG = 0x02
18-
PWMFREQ_REG = 0x04
19-
ADC8BIT_REG = 0x10
20-
ADC16BIT_REG = 0x20
21-
VIN_CURRENT_REG = 0x30
22-
I2C_ADDR_REG = 0xFF
23-
FW_VER_REG = 0xFE
15+
DIRECTION_REG = 0x00
16+
PWM8BIT_REG = 0x01
17+
PWM16BIT_REG = 0x02
18+
PWMFREQ_REG = 0x04
19+
ADC8BIT_REG = 0x10
20+
ADC16BIT_REG = 0x20
21+
VIN_CURRENT_REG = 0x30
22+
I2C_ADDR_REG = 0xFF
23+
FW_VER_REG = 0xFE
24+
2425

2526
class HBRIDGE:
2627
def __init__(self, i2c: Union[I2C, PAHUB], slave_addr=HBRIDGE_ADDR):
@@ -30,8 +31,8 @@ def __init__(self, i2c: Union[I2C, PAHUB], slave_addr=HBRIDGE_ADDR):
3031
"""
3132
self.hbridge_i2c = i2c
3233
self.init_i2c_address(slave_addr)
33-
34-
def init_i2c_address(self, slave_addr = HBRIDGE_ADDR):
34+
35+
def init_i2c_address(self, slave_addr=HBRIDGE_ADDR):
3536
"""
3637
init the i2c address
3738
slave_addr : 0x20 to 0x2F
@@ -40,7 +41,7 @@ def init_i2c_address(self, slave_addr = HBRIDGE_ADDR):
4041
self.i2c_addr = slave_addr
4142
if not (self.i2c_addr in self.hbridge_i2c.scan()):
4243
raise UnitError("Hbridge unit maybe not connect")
43-
44+
4445
def get_driver_config(self, reg=0):
4546
"""
4647
get driver config value
@@ -49,7 +50,7 @@ def get_driver_config(self, reg=0):
4950
if reg > 1:
5051
leng = 2
5152
buf = self.read_reg(reg, leng)
52-
return struct.unpack('<H', buf)[0]
53+
return struct.unpack("<H", buf)[0]
5354
else:
5455
return self.read_reg(reg, leng)[0]
5556

@@ -59,29 +60,29 @@ def set_direction(self, dir=0):
5960
dir : 0 stop, 1 forward, 2 reverse
6061
"""
6162
self.write_mem_list(DIRECTION_REG, [dir])
62-
63+
6364
def set_8bit_pwm(self, duty=0):
6465
"""
6566
set 8bit pwm dutycycle
6667
duty : 0 to 255
6768
"""
6869
self.write_mem_list(PWM8BIT_REG, [duty])
69-
70+
7071
def set_16bit_pwm(self, duty=0):
7172
"""
7273
set 16bit pwm dutycycle
7374
duty : 0 to 65535
7475
"""
75-
self.write_mem_list(PWM16BIT_REG, [(duty & 0xff), ((duty >> 8) & 0xff)])
76+
self.write_mem_list(PWM16BIT_REG, [(duty & 0xFF), ((duty >> 8) & 0xFF)])
7677

7778
def set_pwm_freq(self, freq=0):
7879
"""
7980
set direction
8081
duty : 0 to 65535
8182
"""
82-
freq = max(min(freq, 10000),100)
83-
self.write_mem_list(PWMFREQ_REG, [(freq & 0xff), ((freq >> 8) & 0xff)])
84-
83+
freq = max(min(freq, 10000), 100)
84+
self.write_mem_list(PWMFREQ_REG, [(freq & 0xFF), ((freq >> 8) & 0xFF)])
85+
8586
def get_adc_value(self, raw=0, res=8):
8687
"""
8788
get adc value
@@ -90,48 +91,50 @@ def get_adc_value(self, raw=0, res=8):
9091
if res > 8:
9192
leng = 2
9293
buf = self.read_reg(ADC16BIT_REG, leng)
93-
val = struct.unpack('<H', buf)[0]
94+
val = struct.unpack("<H", buf)[0]
9495
res = 4095
9596
else:
9697
val = self.read_reg(ADC8BIT_REG, leng)[0]
9798
res = 255
9899
if raw:
99100
return val
100101
else:
101-
val = (3.3/res) * val * 11
102+
val = (3.3 / res) * val * 11
102103
return round(val, 2)
103-
104-
#############################support v1.1################################
104+
105+
#############################support v1.1################################
105106
def get_vin_current(self):
106107
"""
107108
get vin current.
108109
"""
109110
buf = self.read_reg(VIN_CURRENT_REG, 4)
110-
return struct.unpack('<f', buf)[0]
111-
#############################support v1.1################################
112-
111+
return struct.unpack("<f", buf)[0]
112+
113+
#############################support v1.1################################
114+
113115
def get_device_status(self, mode):
114116
"""
115117
get firmware version and i2c address.
116-
mode : 0xFE and 0xFF
118+
mode : 0xFE and 0xFF
117119
"""
118120
if mode >= FW_VER_REG and mode <= I2C_ADDR_REG:
119121
return self.read_reg(mode, 1)[0]
120-
122+
121123
def write_mem_list(self, reg, data):
122124
buf = bytearray(data)
123125
self.hbridge_i2c.writeto_mem(self.i2c_addr, reg, buf)
124-
126+
125127
def read_reg(self, reg, num):
126128
return self.hbridge_i2c.readfrom_mem(self.i2c_addr, reg, num)
127-
129+
128130
def deinit(self):
129-
pass
130-
131-
'''
131+
pass
132+
133+
134+
"""
132135
if __name__ == "__main__":
133136
import unit
134137
hbridge = unit.get(unit.HBRIDGE, unit.PORTA)
135138
hbridge.get_driver_config(0)
136139
hbridge.get_driver_config(1)
137-
'''
140+
"""

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