Regenerate processes

Author: Qubitol

epochX/cudacpp/ee_mumu.mad/CODEGEN_mad_ee_mumu_log.txt

@@ -48,7 +48,7 @@ Note that you can still compile and run aMC@NLO with the built-in PDFs
 
 Using default eps viewer "evince". Set another one in ./input/mg5_configuration.txt
 Using default web browser "firefox". Set another one in ./input/mg5_configuration.txt
-import /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu.mg
+import /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu.mg
 The import format was not given, so we guess it as command
 set stdout_level DEBUG
 set output information to level: 10
@@ -57,7 +57,7 @@ generate e+ e- > mu+ mu-
 No model currently active, so we import the Standard Model
 INFO: load particles 
 INFO: load vertices 
-DEBUG: model prefixing  takes 0.004445075988769531 
+DEBUG: model prefixing  takes 0.010645151138305664 
 INFO: Restrict model sm with file models/sm/restrict_default.dat . 
 DEBUG: Simplifying conditional expressions 
 DEBUG: remove interactions: u s w+ at order: QED=1 
@@ -149,7 +149,7 @@ INFO: Checking for minimal orders which gives processes.
 INFO: Please specify coupling orders to bypass this step. 
 INFO: Trying process: e+ e- > mu+ mu- WEIGHTED<=4 @1  
 INFO: Process has 2 diagrams 
-1 processes with 2 diagrams generated in 0.003 s
+1 processes with 2 diagrams generated in 0.007 s
 Total: 1 processes with 2 diagrams
 output madevent_simd ../TMPOUT/CODEGEN_mad_ee_mumu --hel_recycling=False --vector_size=32
 Output will be done with PLUGIN: CUDACPP_OUTPUT
@@ -160,10 +160,10 @@ output madevent_simd ../TMPOUT/CODEGEN_mad_ee_mumu --hel_recycling=False --vecto
 INFO: initialize a new directory: CODEGEN_mad_ee_mumu 
 INFO: remove old information in CODEGEN_mad_ee_mumu 
 DEBUG:  Entering PLUGIN_ProcessExporter.copy_template (initialise the directory) [output.py at line 180] 
-WARNING: File exists /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu 
-INFO: Creating subdirectories in directory /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu 
-WARNING: File exists /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards 
-WARNING: File exists /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/SubProcesses 
+WARNING: File exists /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu 
+INFO: Creating subdirectories in directory /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu 
+WARNING: File exists /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards 
+WARNING: File exists /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/SubProcesses 
 INFO: Organizing processes into subprocess groups 
 INFO: Generating Helas calls for process: e+ e- > mu+ mu- WEIGHTED<=4 @1 
 INFO: Processing color information for process: e+ e- > mu+ mu- @1 
@@ -178,19 +178,19 @@ INFO: Finding symmetric diagrams for subprocess group epem_mupmum
 DEBUG:  len(subproc_diagrams_for_config) =  2 [model_handling.py at line 1552] 
 DEBUG:  iconfig_to_diag =  {1: 1, 2: 2} [model_handling.py at line 1576] 
 DEBUG:  diag_to_iconfig =  {1: 1, 2: 2} [model_handling.py at line 1577] 
-Generated helas calls for 1 subprocesses (2 diagrams) in 0.004 s
-Wrote files for 8 helas calls in 0.060 s
+Generated helas calls for 1 subprocesses (2 diagrams) in 0.008 s
+Wrote files for 8 helas calls in 0.158 s
 ALOHA: aloha starts to compute helicity amplitudes
 ALOHA: aloha creates FFV1 routines
 ALOHA: aloha creates FFV2 routines
 ALOHA: aloha creates FFV4 routines
-ALOHA: aloha creates 3 routines in  0.170 s
+ALOHA: aloha creates 3 routines in  0.362 s
 ALOHA: aloha starts to compute helicity amplitudes
 ALOHA: aloha creates FFV1 routines
 ALOHA: aloha creates FFV2 routines
 ALOHA: aloha creates FFV4 routines
 ALOHA: aloha creates FFV2_4 routines
-ALOHA: aloha creates 7 routines in  0.184 s
+ALOHA: aloha creates 7 routines in  0.534 s
 <class 'aloha.create_aloha.AbstractRoutine'> FFV1
 <class 'aloha.create_aloha.AbstractRoutine'> FFV1
 <class 'aloha.create_aloha.AbstractRoutine'> FFV2
@@ -199,32 +199,32 @@ ALOHA: aloha creates 7 routines in  0.184 s
 <class 'aloha.create_aloha.AbstractRoutine'> FFV4
 <class 'aloha.create_aloha.AbstractRoutine'> FFV2_4
 <class 'aloha.create_aloha.AbstractRoutine'> FFV2_4
-FileWriter <class 'MG5aMC_PLUGIN.CUDACPP_OUTPUT.model_handling.PLUGIN_CPPWriter'> for /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/./HelAmps_sm.h
-INFO: Created file HelAmps_sm.h in directory /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/. 
+FileWriter <class 'MG5aMC_PLUGIN.CUDACPP_OUTPUT.model_handling.PLUGIN_CPPWriter'> for /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/./HelAmps_sm.h
+INFO: Created file HelAmps_sm.h in directory /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/. 
 super_write_set_parameters_onlyfixMajorana (hardcoded=False)
 super_write_set_parameters_onlyfixMajorana (hardcoded=True)
-FileWriter <class 'MG5aMC_PLUGIN.CUDACPP_OUTPUT.model_handling.PLUGIN_CPPWriter'> for /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/./Parameters_sm.h
-FileWriter <class 'MG5aMC_PLUGIN.CUDACPP_OUTPUT.model_handling.PLUGIN_CPPWriter'> for /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/./Parameters_sm.cc
+FileWriter <class 'MG5aMC_PLUGIN.CUDACPP_OUTPUT.model_handling.PLUGIN_CPPWriter'> for /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/./Parameters_sm.h
+FileWriter <class 'MG5aMC_PLUGIN.CUDACPP_OUTPUT.model_handling.PLUGIN_CPPWriter'> for /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/./Parameters_sm.cc
 INFO: Created files Parameters_sm.h and Parameters_sm.cc in directory 
-INFO: /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/. and /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/. 
+INFO: /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/. and /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/src/. 
 The option zerowidth_tchannel is modified [True] but will not be written in the configuration files.
 If you want to make this value the default for future session, you can run 'save options --all'
-save configuration file to /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards/me5_configuration.txt
+save configuration file to /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards/me5_configuration.txt
 INFO: Use Fortran compiler gfortran 
 INFO: Use c++ compiler g++ 
 INFO: Generate jpeg diagrams 
 INFO: Generate web pages 
 DEBUG:  result.returncode =  0 [output.py at line 273] 
-Output to directory /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu done.
+Output to directory /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu done.
 Type "launch" to generate events from this process, or see
-/home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/README
+/home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/README
 Run "open index.html" to see more information about this process.
 quit
 
-real	0m2.396s
-user	0m1.798s
-sys	0m0.425s
-Code generation completed in 2 seconds
+real	0m5.254s
+user	0m3.920s
+sys	0m1.041s
+Code generation completed in 5 seconds
 ************************************************************
 *                                                          *
 *                      W E L C O M E to                    *
@@ -245,9 +245,9 @@ Code generation completed in 2 seconds
 *               Type 'help' for in-line help.              *
 *                                                          *
 ************************************************************
-INFO: load configuration from /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards/me5_configuration.txt  
-INFO: load configuration from /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/mg5amcnlo/input/mg5_configuration.txt  
-INFO: load configuration from /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards/me5_configuration.txt  
+INFO: load configuration from /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards/me5_configuration.txt  
+INFO: load configuration from /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/mg5amcnlo/input/mg5_configuration.txt  
+INFO: load configuration from /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards/me5_configuration.txt  
 Using default eps viewer "evince". Set another one in ./input/mg5_configuration.txt
 Using default web browser "firefox". Set another one in ./input/mg5_configuration.txt
 treatcards run
@@ -274,9 +274,9 @@ launch in debug mode
 *               Type 'help' for in-line help.              *
 *                                                          *
 ************************************************************
-INFO: load configuration from /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards/me5_configuration.txt  
-INFO: load configuration from /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/mg5amcnlo/input/mg5_configuration.txt  
-INFO: load configuration from /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards/me5_configuration.txt  
+INFO: load configuration from /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards/me5_configuration.txt  
+INFO: load configuration from /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/mg5amcnlo/input/mg5_configuration.txt  
+INFO: load configuration from /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/TMPOUT/CODEGEN_mad_ee_mumu/Cards/me5_configuration.txt  
 Using default eps viewer "evince". Set another one in ./input/mg5_configuration.txt
 Using default web browser "firefox". Set another one in ./input/mg5_configuration.txt
 treatcards param

epochX/cudacpp/ee_mumu.mad/Cards/me5_configuration.txt

@@ -235,7 +235,7 @@
 # pineappl = pineappl
 
 
-#mg5_path = /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/mg5amcnlo 
+#mg5_path = /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/mg5amcnlo 
 
 # MG5 MAIN DIRECTORY
-#mg5_path = /home/dmass/Development/madgraph4gpu/release-v1.01.01/MG5aMC/mg5amcnlo
+#mg5_path = /home/dmass/Development/madgraph4gpu/fix-arm-support/MG5aMC/mg5amcnlo

epochX/cudacpp/ee_mumu.mad/SubProcesses/MatrixElementKernels.cc

@@ -250,25 +250,22 @@ namespace mg5amcCpu
     bool known = true;
     bool ok = __builtin_cpu_supports( "vsx" );
     const std::string tag = "powerpc vsx (128bit as in SSE4.2)";
-#elif defined __ARM_NEON__ // consider using __BUILTIN_CPU_SUPPORTS__
-    bool known = false; // __builtin_cpu_supports is not supported
-    // See https://gcc.gnu.org/onlinedocs/gcc/Basic-PowerPC-Built-in-Functions-Available-on-all-Configurations.html
-    // See https://stackoverflow.com/q/62783908
-    // See https://community.arm.com/arm-community-blogs/b/operating-systems-blog/posts/runtime-detection-of-cpu-features-on-an-armv8-a-cpu
-    bool ok = true; // this is just an assumption!
-    const std::string tag = "arm neon (128bit as in SSE4.2)";
 #elif defined( __x86_64__ ) || defined( __i386__ )
     bool known = true;
     bool ok = __builtin_cpu_supports( "sse4.2" );
     const std::string tag = "nehalem (SSE4.2)";
 #else // AV FIXME! Added by OM for Mac, should identify the correct __xxx__ flag that should be targeted
+    // DM now we have an explicit NEON target for ARM
+    bool known = false; // __builtin_cpu_supports is not supported
+    bool ok = true;     // this is just an assumption!
+    const std::string tag = "simd arch not defined";
+#endif
+#elif defined __ARM_NEON // consider using __BUILTIN_CPU_SUPPORTS__
     bool known = false; // __builtin_cpu_supports is not supported
-    // See https://gcc.gnu.org/onlinedocs/gcc/Basic-PowerPC-Built-in-Functions-Available-on-all-Configurations.html
     // See https://stackoverflow.com/q/62783908
     // See https://community.arm.com/arm-community-blogs/b/operating-systems-blog/posts/runtime-detection-of-cpu-features-on-an-armv8-a-cpu
     bool ok = true; // this is just an assumption!
     const std::string tag = "arm neon (128bit as in SSE4.2)";
-#endif
 #else
     bool known = true;
     bool ok = true;

epochX/cudacpp/ee_mumu.mad/SubProcesses/P1_epem_mupmum/check_sa.cc

@@ -912,13 +912,13 @@ main( int argc, char** argv )
 #elif defined __SSE4_2__
 #ifdef __PPC__
   wrkflwtxt += "/ppcv";
-#elif defined __ARM_NEON__
-  wrkflwtxt += "/neon";
 #else
   wrkflwtxt += "/sse4";
 #endif
+#elif defined __ARM_NEON
+  wrkflwtxt += "/neon";
 #else
-  wrkflwtxt += "/????";                                           // no path to this statement
+  wrkflwtxt += "/????"; // no path to this statement
 #endif
   // -- Has cxtype_v::operator[] bracket with non-const reference?
 #if defined MGONGPU_CPPSIMD
@@ -1028,11 +1028,12 @@ main( int argc, char** argv )
               << "Internal loops fptype_sv    = VECTOR[" << neppV
 #ifdef __PPC__
               << "] ('sse4': PPC VSX, 128bit)" << cxtref << std::endl
-#elif defined __ARM_NEON__
-              << "] ('sse4': ARM NEON, 128bit)" << cxtref << std::endl
 #else
               << "] ('sse4': SSE4.2, 128bit)" << cxtref << std::endl
 #endif
+#elif defined __ARM_NEON
+              << "Internal loops fptype_sv    = VECTOR[" << neppV
+              << "] ('sse4': ARM NEON, 128bit)" << cxtref << std::endl
 #else
 #error Internal error: unknown SIMD build configuration
 #endif

epochX/cudacpp/ee_mumu.mad/SubProcesses/cudacpp.mk

@@ -60,7 +60,7 @@ endif
 ifeq ($(BACKEND),cppauto)
   ifeq ($(UNAME_P),ppc64le)
     override BACKEND = cppsse4
-  else ifeq ($(UNAME_P),arm)
+  else ifneq (,$(filter $(UNAME_P),arm aarch64))
     override BACKEND = cppsse4
   else ifeq ($(wildcard /proc/cpuinfo),)
     override BACKEND = cppnone
@@ -516,6 +516,7 @@ CXXFLAGS += $(OMPFLAGS)
 # Set the build flags appropriate to each BACKEND choice (example: "make BACKEND=cppnone")
 # [NB MGONGPU_PVW512 is needed because "-mprefer-vector-width=256" is not exposed in a macro]
 # [See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96476]
+# [Use 'g++ <buildflags> -E -dM - < /dev/null' to check which #define's are enabled]
 ifeq ($(UNAME_P),ppc64le)
   ifeq ($(BACKEND),cppsse4)
     override AVXFLAGS = -D__SSE4_2__ # Power9 VSX with 128 width (VSR registers)
@@ -526,16 +527,30 @@ ifeq ($(UNAME_P),ppc64le)
   else ifeq ($(BACKEND),cpp512z)
     $(error Invalid SIMD BACKEND='$(BACKEND)': only 'cppnone' and 'cppsse4' are supported on PowerPC for the moment)
   endif
-else ifeq ($(UNAME_P),arm)
-  ifeq ($(BACKEND),cppsse4)
-    override AVXFLAGS = -D__SSE4_2__ # ARM NEON with 128 width (Q/quadword registers)
+else ifeq ($(UNAME_P),arm) # ARM on Apple silicon
+  ifeq ($(BACKEND),cppnone) # this internally undefines __ARM_NEON
+    override AVXFLAGS = -DMGONGPU_NOARMNEON
+  else ifeq ($(BACKEND),cppsse4) # __ARM_NEON is always defined on Apple silicon
+    override AVXFLAGS =
   else ifeq ($(BACKEND),cppavx2)
     $(error Invalid SIMD BACKEND='$(BACKEND)': only 'cppnone' and 'cppsse4' are supported on ARM for the moment)
   else ifeq ($(BACKEND),cpp512y)
     $(error Invalid SIMD BACKEND='$(BACKEND)': only 'cppnone' and 'cppsse4' are supported on ARM for the moment)
   else ifeq ($(BACKEND),cpp512z)
     $(error Invalid SIMD BACKEND='$(BACKEND)': only 'cppnone' and 'cppsse4' are supported on ARM for the moment)
   endif
+else ifeq ($(UNAME_P),aarch64) # ARM on Linux
+  ifeq ($(BACKEND),cppnone) # +nosimd ensures __ARM_NEON is absent
+    override AVXFLAGS = -march=armv8-a+nosimd
+  else ifeq ($(BACKEND),cppsse4) # +simd ensures __ARM_NEON is present (128 width Q/quadword registers)
+    override AVXFLAGS = -march=armv8-a+simd
+  else ifeq ($(BACKEND),cppavx2)
+    $(error Invalid SIMD BACKEND='$(BACKEND)': only 'cppnone' and 'cppsse4' are supported on aarch64 for the moment)
+  else ifeq ($(BACKEND),cpp512y)
+    $(error Invalid SIMD BACKEND='$(BACKEND)': only 'cppnone' and 'cppsse4' are supported on aarch64 for the moment)
+  else ifeq ($(BACKEND),cpp512z)
+    $(error Invalid SIMD BACKEND='$(BACKEND)': only 'cppnone' and 'cppsse4' are supported on aarch64 for the moment)
+  endif
 else ifneq ($(shell $(CXX) --version | grep ^nvc++),) # support nvc++ #531
   ifeq ($(BACKEND),cppnone)
     override AVXFLAGS = -mno-sse3 # no SIMD
@@ -1092,7 +1107,7 @@ bld512z:
 ifeq ($(UNAME_P),ppc64le)
 ###bldavxs: $(INCDIR)/fbridge.inc bldnone bldsse4
 bldavxs: bldnone bldsse4
-else ifeq ($(UNAME_P),arm)
+else ifneq (,$(filter $(UNAME_P),arm aarch64))
 ###bldavxs: $(INCDIR)/fbridge.inc bldnone bldsse4
 bldavxs: bldnone bldsse4
 else

epochX/cudacpp/ee_mumu.mad/SubProcesses/cudacpp_overlay.mk

@@ -114,7 +114,7 @@ $(LIBS): .libs
 	touch $@
 
 $(CUDACPP_BUILDDIR)/.cudacpplibs:
-	$(MAKE) -f $(CUDACPP_MAKEFILE)
+	$(MAKE) VERBOSE=1 -f $(CUDACPP_MAKEFILE)
 	touch $@
 
 # Remove per-library recipes from makefile to avoid duplicate sub-makes
@@ -225,7 +225,7 @@ madevent_%_link:
 # Cudacpp bldall targets
 ifeq ($(UNAME_P),ppc64le)
   bldavxs: bldnone bldsse4
-else ifeq ($(UNAME_P),arm)
+else ifneq (,$(filter $(UNAME_P),arm aarch64))
   bldavxs: bldnone bldsse4
 else
   bldavxs: bldnone bldsse4 bldavx2 bld512y bld512z

epochX/cudacpp/ee_mumu.mad/SubProcesses/testmisc.cc

@@ -355,16 +355,18 @@ TEST( XTESTID( MG_EPOCH_PROCESS_ID ), testmisc )
       << "x=" << x << ", x(0to2Pi)=" << mapIn0to2Pi( x ) << ", istep=" << istep;
     EXPECT_NEAR( std::cos( x ), constexpr_cos( x ), std::abs( std::cos( x ) * tolerance ) )
       << "x=" << x << ", x(0to2Pi)=" << mapIn0to2Pi( x ) << ", istep=" << istep;
+#ifndef __aarch64__
     if( !RUNNING_ON_VALGRIND )
     {
       EXPECT_NEAR( std::tan( x ), constexpr_tan( x ), std::abs( std::tan( x ) * tolerance ) )
         << "x=" << x << ", x(0to2Pi)=" << mapIn0to2Pi( x ) << ", istep=" << istep;
     }
     else
+#endif
     {
-      // Higher tolerance when running through valgrind #906
+      // Higher tolerance when running through valgrind #906 (or on aarch64 #1064)
       const long double ctanx = constexpr_tan( x );
-      const long double taninf = 4E14; // declare tan(x) as "infinity if above this threshold
+      const long double taninf = 4E14; // declare tan(x) as "infinity" if above this threshold
       if( ctanx > -taninf && ctanx < taninf )
         EXPECT_NEAR( std::tan( x ), ctanx, std::abs( std::tan( x ) * tolerance ) )
           << "x=" << x << ", x(0to2Pi)=" << mapIn0to2Pi( x ) << ", istep=" << istep;

epochX/cudacpp/ee_mumu.mad/src/mgOnGpuConfig.h

@@ -214,6 +214,11 @@ namespace mgOnGpu
 using mgOnGpu::fptype;
 using mgOnGpu::fptype2;
 
+// Undefine ARM_NEON (hack for cppnone on Apple silicon ARM)
+#ifdef MGONGPU_NOARMNEON
+#undef __ARM_NEON
+#endif
+
 // C++ SIMD vectorization width (this will be used to set neppV)
 #ifdef MGONGPUCPP_GPUIMPL // CUDA and HIP implementations have no SIMD
 #undef MGONGPU_CPPSIMD
@@ -235,7 +240,13 @@ using mgOnGpu::fptype2;
 #else
 #define MGONGPU_CPPSIMD 8
 #endif
-#elif defined __SSE4_2__ // C++ "sse4" SSE4.2 (128-bit ie 16-byte): 2 (DOUBLE) or 4 (FLOAT) [Power9 and ARM default]
+#elif defined __SSE4_2__ // C++ "sse4" SSE4.2 (128-bit ie 16-byte): 2 (DOUBLE) or 4 (FLOAT) [Power9 default]
+#ifdef MGONGPU_FPTYPE_DOUBLE
+#define MGONGPU_CPPSIMD 2
+#else
+#define MGONGPU_CPPSIMD 4
+#endif
+#elif defined __ARM_NEON // C++ "sse4" ARM NEON (128-bit ie 16-byte): 2 (DOUBLE) or 4 (FLOAT) [ARM default]
 #ifdef MGONGPU_FPTYPE_DOUBLE
 #define MGONGPU_CPPSIMD 2
 #else