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[NFC][AMDGPU] Add an IR test for v_cvt_f16_bf8 (llvm#149627)
This was left during the upstream. Co-authored-by: Mekhanoshin, Stanislav <[email protected]>
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‎llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll‎

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@@ -9,6 +9,172 @@ declare half @llvm.amdgcn.cvt.f16.fp8(i32, i32)
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declare <2 x half> @llvm.amdgcn.cvt.pk.f16.bf8(i16)
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declare <2 x half> @llvm.amdgcn.cvt.pk.f16.fp8(i16)
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define amdgpu_ps float @test_cvt_f16_bf8_byte0(i32 %a) {
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; GFX1250-SDAG-REAL16-LABEL: test_cvt_f16_bf8_byte0:
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; GFX1250-SDAG-REAL16: ; %bb.0:
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; GFX1250-SDAG-REAL16-NEXT: v_cvt_f16_bf8_e32 v0.l, v0
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; GFX1250-SDAG-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-SDAG-REAL16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
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; GFX1250-SDAG-REAL16-NEXT: ; return to shader part epilog
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;
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; GFX1250-SDAG-FAKE16-LABEL: test_cvt_f16_bf8_byte0:
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; GFX1250-SDAG-FAKE16: ; %bb.0:
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; GFX1250-SDAG-FAKE16-NEXT: v_cvt_f16_bf8_e32 v0, v0
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; GFX1250-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-SDAG-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX1250-SDAG-FAKE16-NEXT: ; return to shader part epilog
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;
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; GFX1250-GISEL-REAL16-LABEL: test_cvt_f16_bf8_byte0:
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; GFX1250-GISEL-REAL16: ; %bb.0:
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; GFX1250-GISEL-REAL16-NEXT: v_cvt_f16_bf8_e32 v0.l, v0
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; GFX1250-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-GISEL-REAL16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
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; GFX1250-GISEL-REAL16-NEXT: ; return to shader part epilog
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;
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; GFX1250-GISEL-FAKE16-LABEL: test_cvt_f16_bf8_byte0:
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; GFX1250-GISEL-FAKE16: ; %bb.0:
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; GFX1250-GISEL-FAKE16-NEXT: v_cvt_f16_bf8_e32 v0, v0
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; GFX1250-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-GISEL-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX1250-GISEL-FAKE16-NEXT: ; return to shader part epilog
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%cvt = tail call half @llvm.amdgcn.cvt.f16.bf8(i32 %a, i32 0)
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%ret = fpext half %cvt to float
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ret float %ret
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}
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define amdgpu_ps float @test_cvt_f16_bf8_byte1(i32 %a) {
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; GFX1250-SDAG-REAL16-LABEL: test_cvt_f16_bf8_byte1:
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; GFX1250-SDAG-REAL16: ; %bb.0:
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; GFX1250-SDAG-REAL16-NEXT: v_cvt_f16_bf8_e64 v0.l, v0 byte_sel:1
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; GFX1250-SDAG-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-SDAG-REAL16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
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; GFX1250-SDAG-REAL16-NEXT: ; return to shader part epilog
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;
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; GFX1250-SDAG-FAKE16-LABEL: test_cvt_f16_bf8_byte1:
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; GFX1250-SDAG-FAKE16: ; %bb.0:
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; GFX1250-SDAG-FAKE16-NEXT: v_cvt_f16_bf8_e64 v0, v0 byte_sel:1
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; GFX1250-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-SDAG-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX1250-SDAG-FAKE16-NEXT: ; return to shader part epilog
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;
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; GFX1250-GISEL-REAL16-LABEL: test_cvt_f16_bf8_byte1:
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; GFX1250-GISEL-REAL16: ; %bb.0:
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; GFX1250-GISEL-REAL16-NEXT: v_cvt_f16_bf8_e64 v0.l, v0 byte_sel:1
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; GFX1250-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-GISEL-REAL16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
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; GFX1250-GISEL-REAL16-NEXT: ; return to shader part epilog
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;
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; GFX1250-GISEL-FAKE16-LABEL: test_cvt_f16_bf8_byte1:
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; GFX1250-GISEL-FAKE16: ; %bb.0:
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; GFX1250-GISEL-FAKE16-NEXT: v_cvt_f16_bf8_e64 v0, v0 byte_sel:1
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; GFX1250-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-GISEL-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX1250-GISEL-FAKE16-NEXT: ; return to shader part epilog
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%cvt = tail call half @llvm.amdgcn.cvt.f16.bf8(i32 %a, i32 1)
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%ret = fpext half %cvt to float
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ret float %ret
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}
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define amdgpu_ps float @test_cvt_f16_bf8_byte2(i32 %a) {
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; GFX1250-SDAG-REAL16-LABEL: test_cvt_f16_bf8_byte2:
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; GFX1250-SDAG-REAL16: ; %bb.0:
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; GFX1250-SDAG-REAL16-NEXT: v_cvt_f16_bf8_e64 v0.l, v0 byte_sel:2
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; GFX1250-SDAG-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-SDAG-REAL16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
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; GFX1250-SDAG-REAL16-NEXT: ; return to shader part epilog
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;
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; GFX1250-SDAG-FAKE16-LABEL: test_cvt_f16_bf8_byte2:
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; GFX1250-SDAG-FAKE16: ; %bb.0:
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; GFX1250-SDAG-FAKE16-NEXT: v_cvt_f16_bf8_e64 v0, v0 byte_sel:2
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; GFX1250-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-SDAG-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX1250-SDAG-FAKE16-NEXT: ; return to shader part epilog
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;
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; GFX1250-GISEL-REAL16-LABEL: test_cvt_f16_bf8_byte2:
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; GFX1250-GISEL-REAL16: ; %bb.0:
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; GFX1250-GISEL-REAL16-NEXT: v_cvt_f16_bf8_e64 v0.l, v0 byte_sel:2
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; GFX1250-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-GISEL-REAL16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
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; GFX1250-GISEL-REAL16-NEXT: ; return to shader part epilog
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;
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; GFX1250-GISEL-FAKE16-LABEL: test_cvt_f16_bf8_byte2:
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; GFX1250-GISEL-FAKE16: ; %bb.0:
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; GFX1250-GISEL-FAKE16-NEXT: v_cvt_f16_bf8_e64 v0, v0 byte_sel:2
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; GFX1250-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-GISEL-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX1250-GISEL-FAKE16-NEXT: ; return to shader part epilog
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%cvt = tail call half @llvm.amdgcn.cvt.f16.bf8(i32 %a, i32 2)
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%ret = fpext half %cvt to float
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ret float %ret
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}
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define amdgpu_ps float @test_cvt_f16_bf8_byte3(i32 %a) {
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; GFX1250-SDAG-REAL16-LABEL: test_cvt_f16_bf8_byte3:
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; GFX1250-SDAG-REAL16: ; %bb.0:
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; GFX1250-SDAG-REAL16-NEXT: v_cvt_f16_bf8_e64 v0.l, v0 byte_sel:3
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; GFX1250-SDAG-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-SDAG-REAL16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
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; GFX1250-SDAG-REAL16-NEXT: ; return to shader part epilog
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;
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; GFX1250-SDAG-FAKE16-LABEL: test_cvt_f16_bf8_byte3:
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; GFX1250-SDAG-FAKE16: ; %bb.0:
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; GFX1250-SDAG-FAKE16-NEXT: v_cvt_f16_bf8_e64 v0, v0 byte_sel:3
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; GFX1250-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-SDAG-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX1250-SDAG-FAKE16-NEXT: ; return to shader part epilog
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;
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; GFX1250-GISEL-REAL16-LABEL: test_cvt_f16_bf8_byte3:
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; GFX1250-GISEL-REAL16: ; %bb.0:
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; GFX1250-GISEL-REAL16-NEXT: v_cvt_f16_bf8_e64 v0.l, v0 byte_sel:3
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; GFX1250-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-GISEL-REAL16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
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; GFX1250-GISEL-REAL16-NEXT: ; return to shader part epilog
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;
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; GFX1250-GISEL-FAKE16-LABEL: test_cvt_f16_bf8_byte3:
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; GFX1250-GISEL-FAKE16: ; %bb.0:
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; GFX1250-GISEL-FAKE16-NEXT: v_cvt_f16_bf8_e64 v0, v0 byte_sel:3
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; GFX1250-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-GISEL-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0
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; GFX1250-GISEL-FAKE16-NEXT: ; return to shader part epilog
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%cvt = tail call half @llvm.amdgcn.cvt.f16.bf8(i32 %a, i32 3)
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%ret = fpext half %cvt to float
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ret float %ret
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}
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define amdgpu_ps float @test_cvt_f16_bf8_byte3_hi(i32 %a) {
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; GFX1250-SDAG-REAL16-LABEL: test_cvt_f16_bf8_byte3_hi:
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; GFX1250-SDAG-REAL16: ; %bb.0:
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; GFX1250-SDAG-REAL16-NEXT: v_cvt_f16_bf8_e64 v0.h, v0 byte_sel:3
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; GFX1250-SDAG-REAL16-NEXT: v_mov_b16_e32 v0.l, 0
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; GFX1250-SDAG-REAL16-NEXT: ; return to shader part epilog
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;
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; GFX1250-SDAG-FAKE16-LABEL: test_cvt_f16_bf8_byte3_hi:
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; GFX1250-SDAG-FAKE16: ; %bb.0:
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; GFX1250-SDAG-FAKE16-NEXT: v_cvt_f16_bf8_e64 v0, v0 byte_sel:3
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; GFX1250-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-SDAG-FAKE16-NEXT: v_perm_b32 v0, v0, 0, 0x5040100
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; GFX1250-SDAG-FAKE16-NEXT: ; return to shader part epilog
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;
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; GFX1250-GISEL-REAL16-LABEL: test_cvt_f16_bf8_byte3_hi:
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; GFX1250-GISEL-REAL16: ; %bb.0:
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; GFX1250-GISEL-REAL16-NEXT: v_cvt_f16_bf8_e64 v0.l, v0 byte_sel:3
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; GFX1250-GISEL-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-GISEL-REAL16-NEXT: v_lshl_or_b32 v0, v0, 16, 0
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; GFX1250-GISEL-REAL16-NEXT: ; return to shader part epilog
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;
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; GFX1250-GISEL-FAKE16-LABEL: test_cvt_f16_bf8_byte3_hi:
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; GFX1250-GISEL-FAKE16: ; %bb.0:
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; GFX1250-GISEL-FAKE16-NEXT: v_cvt_f16_bf8_e64 v0, v0 byte_sel:3
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; GFX1250-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v0, 16, 0
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; GFX1250-GISEL-FAKE16-NEXT: ; return to shader part epilog
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%cvt = tail call half @llvm.amdgcn.cvt.f16.bf8(i32 %a, i32 3)
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%ins.0 = insertelement <2 x half> undef, half 0.0, i32 0
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%ins.1 = insertelement <2 x half> %ins.0, half %cvt, i32 1
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%ret = bitcast <2 x half> %ins.1 to float
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ret float %ret
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}
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define amdgpu_ps float @test_cvt_f16_fp8_byte0(i32 %a) {
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; GFX1250-SDAG-REAL16-LABEL: test_cvt_f16_fp8_byte0:
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; GFX1250-SDAG-REAL16: ; %bb.0:

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