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jurahulmahesh-attarde
jurahul
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mahesh-attarde
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[NFC][LLVM] Pass/return SMLoc by value instead of const reference (llvm#160797)
SMLoc itself encapsulates just a pointer, so there is no need to pass or return it by reference.
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8 files changed

+23
-26
lines changed

8 files changed

+23
-26
lines changed

‎llvm/include/llvm/Support/SMLoc.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,8 +28,8 @@ class SMLoc {
2828

2929
constexpr bool isValid() const { return Ptr != nullptr; }
3030

31-
constexpr bool operator==(const SMLoc &RHS) const { return RHS.Ptr == Ptr; }
32-
constexpr bool operator!=(const SMLoc &RHS) const { return RHS.Ptr != Ptr; }
31+
constexpr bool operator==(SMLoc RHS) const { return RHS.Ptr == Ptr; }
32+
constexpr bool operator!=(SMLoc RHS) const { return RHS.Ptr != Ptr; }
3333

3434
constexpr const char *getPointer() const { return Ptr; }
3535

‎llvm/include/llvm/TableGen/Record.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1577,7 +1577,7 @@ class RecordVal {
15771577
}
15781578

15791579
/// Get the source location of the point where the field was defined.
1580-
const SMLoc &getLoc() const { return Loc; }
1580+
SMLoc getLoc() const { return Loc; }
15811581

15821582
/// Is this a field where nonconcrete values are okay?
15831583
bool isNonconcreteOK() const {

‎llvm/lib/MC/MCSFrame.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -200,7 +200,7 @@ class SFrameEmitterImpl {
200200
return false;
201201
}
202202

203-
bool setCFAOffset(SFrameFRE &FRE, const SMLoc &Loc, size_t Offset) {
203+
bool setCFAOffset(SFrameFRE &FRE, SMLoc Loc, size_t Offset) {
204204
if (!FRE.CFARegSet) {
205205
Streamer.getContext().reportWarning(
206206
Loc, "adjusting CFA offset without a base register. "

‎llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp‎

Lines changed: 11 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1807,7 +1807,8 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
18071807
const OperandVector &Operands) const;
18081808
SMLoc getInstLoc(const OperandVector &Operands) const;
18091809

1810-
bool validateInstruction(const MCInst &Inst, const SMLoc &IDLoc, const OperandVector &Operands);
1810+
bool validateInstruction(const MCInst &Inst, SMLoc IDLoc,
1811+
const OperandVector &Operands);
18111812
bool validateOffset(const MCInst &Inst, const OperandVector &Operands);
18121813
bool validateFlatOffset(const MCInst &Inst, const OperandVector &Operands);
18131814
bool validateSMEMOffset(const MCInst &Inst, const OperandVector &Operands);
@@ -1824,8 +1825,8 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
18241825
bool validateMIMGAtomicDMask(const MCInst &Inst);
18251826
bool validateMIMGGatherDMask(const MCInst &Inst);
18261827
bool validateMovrels(const MCInst &Inst, const OperandVector &Operands);
1827-
bool validateMIMGDataSize(const MCInst &Inst, const SMLoc &IDLoc);
1828-
bool validateMIMGAddrSize(const MCInst &Inst, const SMLoc &IDLoc);
1828+
bool validateMIMGDataSize(const MCInst &Inst, SMLoc IDLoc);
1829+
bool validateMIMGAddrSize(const MCInst &Inst, SMLoc IDLoc);
18291830
bool validateMIMGD16(const MCInst &Inst);
18301831
bool validateMIMGDim(const MCInst &Inst, const OperandVector &Operands);
18311832
bool validateTensorR128(const MCInst &Inst);
@@ -1847,7 +1848,7 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
18471848
bool validateDivScale(const MCInst &Inst);
18481849
bool validateWaitCnt(const MCInst &Inst, const OperandVector &Operands);
18491850
bool validateCoherencyBits(const MCInst &Inst, const OperandVector &Operands,
1850-
const SMLoc &IDLoc);
1851+
SMLoc IDLoc);
18511852
bool validateTHAndScopeBits(const MCInst &Inst, const OperandVector &Operands,
18521853
const unsigned CPol);
18531854
bool validateTFE(const MCInst &Inst, const OperandVector &Operands);
@@ -1864,7 +1865,7 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
18641865
bool isSupportedMnemo(StringRef Mnemo,
18651866
const FeatureBitset &FBS,
18661867
ArrayRef<unsigned> Variants);
1867-
bool checkUnsupportedInstruction(StringRef Name, const SMLoc &IDLoc);
1868+
bool checkUnsupportedInstruction(StringRef Name, SMLoc IDLoc);
18681869

18691870
bool isId(const StringRef Id) const;
18701871
bool isId(const AsmToken &Token, const StringRef Id) const;
@@ -4087,8 +4088,7 @@ bool AMDGPUAsmParser::validateIntClampSupported(const MCInst &Inst) {
40874088
constexpr uint64_t MIMGFlags =
40884089
SIInstrFlags::MIMG | SIInstrFlags::VIMAGE | SIInstrFlags::VSAMPLE;
40894090

4090-
bool AMDGPUAsmParser::validateMIMGDataSize(const MCInst &Inst,
4091-
const SMLoc &IDLoc) {
4091+
bool AMDGPUAsmParser::validateMIMGDataSize(const MCInst &Inst, SMLoc IDLoc) {
40924092

40934093
const unsigned Opc = Inst.getOpcode();
40944094
const MCInstrDesc &Desc = MII.get(Opc);
@@ -4135,8 +4135,7 @@ bool AMDGPUAsmParser::validateMIMGDataSize(const MCInst &Inst,
41354135
return false;
41364136
}
41374137

4138-
bool AMDGPUAsmParser::validateMIMGAddrSize(const MCInst &Inst,
4139-
const SMLoc &IDLoc) {
4138+
bool AMDGPUAsmParser::validateMIMGAddrSize(const MCInst &Inst, SMLoc IDLoc) {
41404139
const unsigned Opc = Inst.getOpcode();
41414140
const MCInstrDesc &Desc = MII.get(Opc);
41424141

@@ -5344,7 +5343,7 @@ bool AMDGPUAsmParser::validateGWS(const MCInst &Inst,
53445343

53455344
bool AMDGPUAsmParser::validateCoherencyBits(const MCInst &Inst,
53465345
const OperandVector &Operands,
5347-
const SMLoc &IDLoc) {
5346+
SMLoc IDLoc) {
53485347
int CPolPos = AMDGPU::getNamedOperandIdx(Inst.getOpcode(),
53495348
AMDGPU::OpName::cpol);
53505349
if (CPolPos == -1)
@@ -5541,8 +5540,7 @@ bool AMDGPUAsmParser::validateWMMA(const MCInst &Inst,
55415540
validateFmt(AMDGPU::OpName::matrix_b_fmt, AMDGPU::OpName::src1);
55425541
}
55435542

5544-
bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst,
5545-
const SMLoc &IDLoc,
5543+
bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst, SMLoc IDLoc,
55465544
const OperandVector &Operands) {
55475545
if (!validateLdsDirect(Inst, Operands))
55485546
return false;
@@ -5704,7 +5702,7 @@ bool AMDGPUAsmParser::isSupportedMnemo(StringRef Mnemo,
57045702
}
57055703

57065704
bool AMDGPUAsmParser::checkUnsupportedInstruction(StringRef Mnemo,
5707-
const SMLoc &IDLoc) {
5705+
SMLoc IDLoc) {
57085706
FeatureBitset FBS = ComputeAvailableFeatures(getFeatureBits());
57095707

57105708
// Check if requested instruction variant is supported.

‎llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -135,17 +135,17 @@ class UnwindContext {
135135
MCRegister getFPReg() const { return FPReg; }
136136

137137
void emitFnStartLocNotes() const {
138-
for (const SMLoc &Loc : FnStartLocs)
138+
for (SMLoc Loc : FnStartLocs)
139139
Parser.Note(Loc, ".fnstart was specified here");
140140
}
141141

142142
void emitCantUnwindLocNotes() const {
143-
for (const SMLoc &Loc : CantUnwindLocs)
143+
for (SMLoc Loc : CantUnwindLocs)
144144
Parser.Note(Loc, ".cantunwind was specified here");
145145
}
146146

147147
void emitHandlerDataLocNotes() const {
148-
for (const SMLoc &Loc : HandlerDataLocs)
148+
for (SMLoc Loc : HandlerDataLocs)
149149
Parser.Note(Loc, ".handlerdata was specified here");
150150
}
151151

‎llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -39,9 +39,9 @@ class M68kAsmParser : public MCTargetAsmParser {
3939
#include "M68kGenAsmMatcher.inc"
4040

4141
// Helpers for Match&Emit.
42-
bool invalidOperand(const SMLoc &Loc, const OperandVector &Operands,
42+
bool invalidOperand(SMLoc Loc, const OperandVector &Operands,
4343
const uint64_t &ErrorInfo);
44-
bool missingFeature(const SMLoc &Loc, const uint64_t &ErrorInfo);
44+
bool missingFeature(SMLoc Loc, const uint64_t &ErrorInfo);
4545
bool emit(MCInst &Inst, SMLoc const &Loc, MCStreamer &Out) const;
4646
bool parseRegisterName(MCRegister &RegNo, SMLoc Loc, StringRef RegisterName);
4747
ParseStatus parseRegister(MCRegister &RegNo);

‎llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1247,7 +1247,7 @@ class X86AsmParser : public MCTargetAsmParser {
12471247
/// return false if no parsing errors occurred, true otherwise.
12481248
bool HandleAVX512Operand(OperandVector &Operands);
12491249

1250-
bool ParseZ(std::unique_ptr<X86Operand> &Z, const SMLoc &StartLoc);
1250+
bool ParseZ(std::unique_ptr<X86Operand> &Z, SMLoc StartLoc);
12511251

12521252
bool is64BitMode() const {
12531253
// FIXME: Can tablegen auto-generate this?
@@ -2907,8 +2907,7 @@ X86::CondCode X86AsmParser::ParseConditionCode(StringRef CC) {
29072907

29082908
// true on failure, false otherwise
29092909
// If no {z} mark was found - Parser doesn't advance
2910-
bool X86AsmParser::ParseZ(std::unique_ptr<X86Operand> &Z,
2911-
const SMLoc &StartLoc) {
2910+
bool X86AsmParser::ParseZ(std::unique_ptr<X86Operand> &Z, SMLoc StartLoc) {
29122911
MCAsmParser &Parser = getParser();
29132912
// Assuming we are just pass the '{' mark, quering the next token
29142913
// Searched for {z}, but none was found. Return false, as no parsing error was

‎llvm/utils/FileCheck/FileCheck.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -384,7 +384,7 @@ BuildInputAnnotations(const SourceMgr &SM, unsigned CheckFileBufferID,
384384
std::vector<InputAnnotation> &Annotations,
385385
unsigned &LabelWidth) {
386386
struct CompareSMLoc {
387-
bool operator()(const SMLoc &LHS, const SMLoc &RHS) const {
387+
bool operator()(SMLoc LHS, SMLoc RHS) const {
388388
return LHS.getPointer() < RHS.getPointer();
389389
}
390390
};

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