build: use aclint from crates.io

Signed-off-by: YdrMaster <[email protected]>

Author: YdrMaster

CHANGELOG.md

@@ -16,6 +16,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
 - Use instance based RustSBI interface, with separate functions for legacy stdio
 - Update sbi-testing to version 0.0.1
 - Use crate rcore-console version 0.0.0 in rustsbi-qemu and test-kernel for `print!` and `println!`
+- Use crate aclint version 0.0.0 in rustsbi-qemu for aclint structs
 - Use crate os-xtask-utils version 0.0.0 in xtask builder
 
 ### Fixed

Cargo.lock

@@ -26,9 +26,9 @@ uart_16550 = "0.2"
 rcore-console = "0.0.0"
 dtb-walker = "=0.2.0-alpha.3"
 qemu-exit = "3.0"
+aclint = "0.0.0"
 
 hsm-cell = { path = "../hsm-cell" }
-riscv-aclint = { git = "https://github.com/YdrMaster/riscv-aclint" }
 fast-trap = { git = "https://github.com/YdrMaster/fast-trap", rev = "ffb40e2", features = [
     "riscv-m",
 ] }

rustsbi-qemu/Cargo.toml

@@ -1,8 +1,6 @@
-#![allow(unused)]
-
 use crate::{hart_id, trap_stack::remote_hsm};
+use aclint::SifiveClint;
 use core::{cell::UnsafeCell, mem::MaybeUninit, ptr::NonNull};
-use riscv_aclint::SifiveClint;
 use rustsbi::{spec::binary::SbiRet, HartMask, Ipi, Timer};
 use spin::Once;
 

rustsbi-qemu/src/clint.rs

@@ -1,7 +1,7 @@
+use aclint::SifiveClint as Clint;
 use core::arch::asm;
 use fast_trap::trap_entry;
 use riscv::register::mtvec::{self, TrapMode::*};
-use riscv_aclint::SifiveClint as Clint;
 
 /// 加载陷入向量。
 #[inline]