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sylvioalveskartben
sylvioalves
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soc: espressif: keep RTC data after deep-sleep
This PR includes changes in all Espressif's SoCs to enable keeping data in RTC memory after deep-sleep. Signed-off-by: Sylvio Alves <[email protected]>
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7 files changed

+378
-217
lines changed

7 files changed

+378
-217
lines changed

‎soc/espressif/common/loader.c‎

Lines changed: 19 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -56,10 +56,15 @@
5656
#define IS_IRAM(addr) (addr >= SOC_IRAM_LOW && addr < SOC_IRAM_HIGH)
5757
#define IS_IROM(addr) (addr >= SOC_IROM_LOW && addr < SOC_IROM_HIGH)
5858
#define IS_DROM(addr) (addr >= SOC_DROM_LOW && addr < SOC_DROM_HIGH)
59-
#define IS_SRAM(addr) (IS_IRAM(addr) || IS_DRAM(addr))
60-
#define IS_MMAP(addr) (IS_IROM(addr) || IS_DROM(addr))
61-
#define IS_NONE(addr) \
62-
(!IS_IROM(addr) && !IS_DROM(addr) && !IS_IRAM(addr) && !IS_DRAM(addr) && !IS_PADD(addr))
59+
#ifdef SOC_RTC_MEM_SUPPORTED
60+
#define IS_RTC(addr) (addr >= SOC_RTC_DRAM_LOW && addr < SOC_RTC_DRAM_HIGH)
61+
#else
62+
#define IS_RTC(addr) 0
63+
#endif
64+
#define IS_SRAM(addr) (IS_IRAM(addr) || IS_DRAM(addr))
65+
#define IS_MMAP(addr) (IS_IROM(addr) || IS_DROM(addr))
66+
#define IS_NONE(addr) (!IS_IROM(addr) && !IS_DROM(addr) \
67+
&& !IS_IRAM(addr) && !IS_DRAM(addr) && !IS_PADD(addr) && !IS_RTC(addr))
6368

6469
#define HDR_ATTR __attribute__((section(".entry_addr"))) __attribute__((used))
6570

@@ -78,6 +83,7 @@ static uint32_t _app_irom_size = (uint32_t)&_image_irom_size;
7883
static uint32_t _app_drom_start =
7984
(FIXED_PARTITION_OFFSET(slot0_partition) + (uint32_t)&_image_drom_start);
8085
static uint32_t _app_drom_size = (uint32_t)&_image_drom_size;
86+
8187
#endif
8288

8389
static uint32_t _app_irom_vaddr = ((uint32_t)&_image_irom_vaddr);
@@ -122,14 +128,13 @@ void map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr, uint32_t
122128
}
123129

124130
ESP_EARLY_LOGI(TAG, "%s: lma 0x%08x vma 0x%08x len 0x%-6x (%u)",
125-
IS_NONE(segment_hdr.load_addr) ? "???"
126-
: IS_MMAP(segment_hdr.load_addr)
127-
? IS_IROM(segment_hdr.load_addr) ? "IMAP" : "DMAP"
128-
: IS_PADD(segment_hdr.load_addr) ? "padd"
129-
: IS_DRAM(segment_hdr.load_addr) ? "DRAM"
130-
: "IRAM",
131-
offset + sizeof(esp_image_segment_header_t), segment_hdr.load_addr,
132-
segment_hdr.data_len, segment_hdr.data_len);
131+
IS_NONE(segment_hdr.load_addr) ? "???" :
132+
IS_MMAP(segment_hdr.load_addr) ?
133+
IS_IROM(segment_hdr.load_addr) ? "IMAP" : "DMAP" :
134+
IS_DRAM(segment_hdr.load_addr) ? "DRAM" :
135+
IS_RTC(segment_hdr.load_addr) ? "RTC" : "IRAM",
136+
offset + sizeof(esp_image_segment_header_t),
137+
segment_hdr.load_addr, segment_hdr.data_len, segment_hdr.data_len);
133138

134139
/* Fix drom and irom produced be the linker, as it could
135140
* be invalidated by the elf2image and flash load offset
@@ -142,9 +147,10 @@ void map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr, uint32_t
142147
app_irom_start = offset + sizeof(esp_image_segment_header_t);
143148
app_irom_start_aligned = app_irom_start & MMU_FLASH_MASK;
144149
}
145-
if (IS_SRAM(segment_hdr.load_addr)) {
150+
if (IS_SRAM(segment_hdr.load_addr) || IS_RTC(segment_hdr.load_addr)) {
146151
ram_segments++;
147152
}
153+
148154
offset += sizeof(esp_image_segment_header_t) + segment_hdr.data_len;
149155

150156
if (ram_segments == bootloader_image_hdr.segment_count && !checksum) {

‎soc/espressif/esp32/default.ld‎

Lines changed: 89 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -54,8 +54,8 @@ MEMORY
5454
{
5555
#ifdef CONFIG_BOOTLOADER_MCUBOOT
5656
mcuboot_hdr (R): org = 0x0, len = 0x20
57-
metadata (R): org = 0x20, len = 0x20
58-
FLASH (R): org = 0x40, len = FLASH_SIZE - 0x40
57+
metadata (R): org = 0x20, len = 0x60
58+
FLASH (R): org = 0x80, len = FLASH_SIZE - 0x80
5959
#else
6060
/* Make safety margin in the FLASH memory size so the
6161
* (esp_img_header + (n*esp_seg_headers)) would fit */
@@ -69,7 +69,19 @@ MEMORY
6969
drom0_0_seg(R): org = DROM_SEG_ORG, len = DROM_SEG_LEN
7070

7171
rtc_iram_seg(RWX): org = 0x400c0000, len = 0x2000
72-
rtc_slow_seg(RW): org = 0x50000000, len = 0x1000
72+
rtc_slow_seg(RW): org = 0x50000000, len = 0x2000 - CONFIG_RESERVE_RTC_MEM
73+
rtc_data_seg(RW): org = 0x3ff80000, len = 0x2000
74+
75+
/* We reduced the size of rtc_slow_seg by CONFIG_RESERVE_RTC_MEM value.
76+
It reserves the amount of RTC slow memory that we use for this memory segment.
77+
This segment is intended for keeping rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
78+
The aim of this is to keep data that will not be moved around and have a fixed address.
79+
org = 0x50000000 + 0x2000 - CONFIG_RESERVE_RTC_MEM
80+
*/
81+
#if (CONFIG_RESERVE_RTC_MEM > 0)
82+
rtc_slow_reserved_seg(RW): org = 0x50000000 + 0x2000 - CONFIG_RESERVE_RTC_MEM,
83+
len = CONFIG_RESERVE_RTC_MEM
84+
#endif
7385

7486
#ifdef CONFIG_ESP_SPIRAM
7587
ext_ram_seg(RW): org = 0x3f800000, len = CONFIG_ESP_SPIRAM_SIZE
@@ -126,6 +138,25 @@ SECTIONS
126138
LONG(ADDR(.dram0.data))
127139
LONG(LOADADDR(.dram0.data))
128140
LONG(LOADADDR(.dram0.end) + SIZEOF(.dram0.end) - LOADADDR(.dram0.data))
141+
142+
/* RTC_TEXT metadata:
143+
* 8. Destination address (VMA) for RTC_TEXT region
144+
* 9. Flash offset (LMA) for start of RTC_TEXT region
145+
* 10. Size of RTC region
146+
*/
147+
LONG(ADDR(.rtc.text))
148+
LONG(LOADADDR(.rtc.text))
149+
LONG(SIZEOF(.rtc.text))
150+
151+
/* RTC_DATA metadata:
152+
* 11. Destination address (VMA) for RTC_DATA region
153+
* 12. Flash offset (LMA) for start of RTC_DATA region
154+
* 13. Size of RTC region
155+
*/
156+
LONG(ADDR(.rtc.data))
157+
LONG(LOADADDR(.rtc.data))
158+
LONG(SIZEOF(.rtc.data))
159+
129160
} > metadata
130161
#endif /* CONFIG_BOOTLOADER_MCUBOOT */
131162

@@ -137,54 +168,90 @@ SECTIONS
137168

138169
/* --- RTC BEGIN --- */
139170

140-
/* RTC fast memory holds RTC wake stub code,
141-
* including from any source file named rtc_wake_stub*.c
142-
*/
143171
.rtc.text :
144172
{
145173
. = ALIGN(4);
146-
*(.rtc.literal .rtc.text)
147-
*rtc_wake_stub*.o(.literal .text .literal.* .text.*)
174+
*(.rtc.literal .rtc.literal.*)
175+
*(.rtc.text .rtc.text.*)
176+
. = ALIGN(4);
148177
} GROUP_DATA_LINK_IN(rtc_iram_seg, ROMABLE_REGION)
149178

150-
/* RTC slow memory holds RTC wake stub
151-
* data/rodata, including from any source file
152-
* named rtc_wake_stub*.c
153-
*/
179+
/*
180+
This section is required to skip rtc.text area because rtc_iram_seg and
181+
rtc_data_seg reflect the same address space on different buses.
182+
*/
183+
.rtc.dummy :
184+
{
185+
. = SIZEOF(.rtc.text);
186+
} GROUP_DATA_LINK_IN(rtc_data_seg, ROMABLE_REGION)
187+
188+
/* This section located in RTC FAST Memory area.
189+
It holds data marked with RTC_FAST_ATTR attribute.
190+
See the file "esp_attr.h" for more information.
191+
*/
192+
.rtc.force_fast :
193+
{
194+
. = ALIGN(4);
195+
*(.rtc.force_fast .rtc.force_fast.*)
196+
. = ALIGN(4);
197+
} GROUP_DATA_LINK_IN(rtc_data_seg, ROMABLE_REGION)
198+
199+
/* RTC data section holds RTC wake stub
200+
data/rodata, including from any source file
201+
named rtc_wake_stub*.c and the data marked with
202+
RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
203+
*/
154204
.rtc.data :
155205
{
206+
. = ALIGN(4);
156207
_rtc_data_start = ABSOLUTE(.);
157-
*(.rtc.data)
158-
*(.rtc.rodata)
159-
*rtc_wake_stub*.o(.data .rodata .data.* .rodata.* .bss .bss.*)
160-
_rtc_data_end = ABSOLUTE(.);
208+
*(.rtc.data .rtc.data.*)
209+
*(.rtc.rodata .rtc.rodata.*)
210+
. = ALIGN(4);
161211
} GROUP_DATA_LINK_IN(rtc_slow_seg, ROMABLE_REGION)
162212

163-
/* RTC bss, from any source file named rtc_wake_stub*.c */
164213
.rtc.bss (NOLOAD) :
165214
{
166215
_rtc_bss_start = ABSOLUTE(.);
167-
*rtc_wake_stub*.o(.bss .bss.*)
168-
*rtc_wake_stub*.o(COMMON)
216+
*(.rtc.bss .rtc.bss.*)
169217
_rtc_bss_end = ABSOLUTE(.);
170218
} GROUP_LINK_IN(rtc_slow_seg)
171219

220+
.rtc_noinit (NOLOAD) :
221+
{
222+
. = ALIGN(4);
223+
*(.rtc_noinit .rtc_noinit.*)
224+
. = ALIGN(4) ;
225+
} GROUP_LINK_IN(rtc_slow_seg)
226+
172227
/* This section located in RTC SLOW Memory area.
173228
* It holds data marked with RTC_SLOW_ATTR attribute.
174229
* See the file "esp_attr.h" for more information.
175230
*/
176231
.rtc.force_slow :
177232
{
178233
. = ALIGN(4);
179-
_rtc_force_slow_start = ABSOLUTE(.);
180234
*(.rtc.force_slow .rtc.force_slow.*)
181235
. = ALIGN(4) ;
182236
_rtc_force_slow_end = ABSOLUTE(.);
183-
} > rtc_slow_seg
237+
} GROUP_DATA_LINK_IN(rtc_slow_seg, ROMABLE_REGION)
184238

185-
/* Get size of rtc slow data */
186239
_rtc_slow_length = (_rtc_force_slow_end - _rtc_data_start);
187240

241+
/**
242+
* This section holds RTC SLOW data that should have fixed addresses.
243+
* The data are not initialized at power-up and are retained during deep sleep.
244+
*/
245+
#if (CONFIG_RESERVE_RTC_MEM > 0)
246+
.rtc_slow_reserved (NOLOAD) :
247+
{
248+
. = ALIGN(4);
249+
_rtc_slow_reserved_start = ABSOLUTE(.);
250+
*(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
251+
_rtc_slow_reserved_end = ABSOLUTE(.);
252+
} GROUP_LINK_IN(rtc_slow_reserved_seg)
253+
#endif
254+
188255
/* --- RTC END --- */
189256

190257
/* --- IRAM BEGIN --- */

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