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[DA] getBackedgeTakenCount in isKnownLessThan can return CouldNotCompute (llvm#162495)
Bail out when the backedge taken count is a CouldNotCompute SCEV in function isKnownLessThan; we cannot and do not want to query things like its Type. Fixes llvm#159979
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+55
-24
lines changed

2 files changed

+55
-24
lines changed

llvm/lib/Analysis/DependenceAnalysis.cpp

Lines changed: 33 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1180,32 +1180,41 @@ bool DependenceInfo::isKnownLessThan(const SCEV *S, const SCEV *Size) const {
11801180
S = SE->getTruncateOrZeroExtend(S, MaxType);
11811181
Size = SE->getTruncateOrZeroExtend(Size, MaxType);
11821182

1183-
// Special check for addrecs using BE taken count
1184-
if (const SCEVAddRecExpr *AddRec = dyn_cast<SCEVAddRecExpr>(S))
1185-
if (AddRec->isAffine() && AddRec->hasNoSignedWrap()) {
1186-
const SCEV *BECount = SE->getBackedgeTakenCount(AddRec->getLoop());
1187-
const SCEV *Start = AddRec->getStart();
1188-
const SCEV *Step = AddRec->getStepRecurrence(*SE);
1189-
const SCEV *End = AddRec->evaluateAtIteration(BECount, *SE);
1190-
const SCEV *Diff0 = SE->getMinusSCEV(Start, Size);
1191-
const SCEV *Diff1 = SE->getMinusSCEV(End, Size);
1192-
1193-
// If the value of Step is non-negative and the AddRec is non-wrap, it
1194-
// reaches its maximum at the last iteration. So it's enouth to check
1195-
// whether End - Size is negative.
1196-
if (SE->isKnownNonNegative(Step) && SE->isKnownNegative(Diff1))
1197-
return true;
1183+
auto CheckAddRecBECount = [&]() {
1184+
const SCEVAddRecExpr *AddRec = dyn_cast<SCEVAddRecExpr>(S);
1185+
if (!AddRec || !AddRec->isAffine() || !AddRec->hasNoSignedWrap())
1186+
return false;
1187+
const SCEV *BECount = collectUpperBound(AddRec->getLoop(), MaxType);
1188+
// If the BTC cannot be computed, check the base case for S.
1189+
if (!BECount || isa<SCEVCouldNotCompute>(BECount))
1190+
return false;
1191+
const SCEV *Start = AddRec->getStart();
1192+
const SCEV *Step = AddRec->getStepRecurrence(*SE);
1193+
const SCEV *End = AddRec->evaluateAtIteration(BECount, *SE);
1194+
const SCEV *Diff0 = SE->getMinusSCEV(Start, Size);
1195+
const SCEV *Diff1 = SE->getMinusSCEV(End, Size);
1196+
1197+
// If the value of Step is non-negative and the AddRec is non-wrap, it
1198+
// reaches its maximum at the last iteration. So it's enouth to check
1199+
// whether End - Size is negative.
1200+
if (SE->isKnownNonNegative(Step) && SE->isKnownNegative(Diff1))
1201+
return true;
11981202

1199-
// If the value of Step is non-positive and the AddRec is non-wrap, the
1200-
// initial value is its maximum.
1201-
if (SE->isKnownNonPositive(Step) && SE->isKnownNegative(Diff0))
1202-
return true;
1203+
// If the value of Step is non-positive and the AddRec is non-wrap, the
1204+
// initial value is its maximum.
1205+
if (SE->isKnownNonPositive(Step) && SE->isKnownNegative(Diff0))
1206+
return true;
12031207

1204-
// Even if we don't know the sign of Step, either Start or End must be
1205-
// the maximum value of the AddRec since it is non-wrap.
1206-
if (SE->isKnownNegative(Diff0) && SE->isKnownNegative(Diff1))
1207-
return true;
1208-
}
1208+
// Even if we don't know the sign of Step, either Start or End must be
1209+
// the maximum value of the AddRec since it is non-wrap.
1210+
if (SE->isKnownNegative(Diff0) && SE->isKnownNegative(Diff1))
1211+
return true;
1212+
1213+
return false;
1214+
};
1215+
1216+
if (CheckAddRecBECount())
1217+
return true;
12091218

12101219
// Check using normal isKnownNegative
12111220
const SCEV *LimitedBound = SE->getMinusSCEV(S, Size);
Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 6
2+
; RUN: opt < %s -disable-output "-passes=print<da>" -aa-pipeline=basic-aa 2>&1 | FileCheck %s
3+
4+
; Test for function isKnownLessThan that calculates a back-edge taken count,
5+
; which can return a CouldNotCompute SCEV.
6+
7+
define void @test(i64 %conv, ptr %a) {
8+
; CHECK-LABEL: 'test'
9+
; CHECK-NEXT: Src: %ld = load i32, ptr %arrayidx12, align 4 --> Dst: %ld = load i32, ptr %arrayidx12, align 4
10+
; CHECK-NEXT: da analyze - none!
11+
;
12+
entry:
13+
%sub = add i64 %conv, 1
14+
br label %loop
15+
16+
loop:
17+
%i = phi i64 [ %add26, %loop ], [ 0, %entry ]
18+
%arrayidx12 = getelementptr i32, ptr %a, i64 %i
19+
%ld = load i32, ptr %arrayidx12, align 4
20+
%add26 = add nsw i64 %sub, %i
21+
br label %loop
22+
}

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