hw/adc: Add basic Aspeed ADC model

This model implements enough behaviour to do basic functionality tests
such as device initialisation and read out of dummy sample values. The
sample value generation strategy is similar to the STM ADC already in
the tree.

Signed-off-by: Andrew Jeffery <[email protected]>
[clg : support for multiple engines (AST2600) ]
Signed-off-by: Cédric Le Goater <[email protected]>
[pdel : refactored engine register struct fields to regs[] array field]
[pdel : added guest-error checking for upper-8 channel regs in AST2600]
[pdel : allow 16-bit reads of the channel data registers]
Signed-off-by: Peter Delevoryas <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Cédric Le Goater <[email protected]>

Author: amboar