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#include "qemu/error-report.h"
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#include "qemu/log.h"
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#include "cpu.h"
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- #include "hw/hw.h"
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#include "hw/irq.h"
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#include "hw/m68k/mcf.h"
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#include "qemu/timer.h"
@@ -69,10 +68,16 @@ static void m5206_timer_recalibrate(m5206_timer_state *s)
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if (mode == 2 )
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prescale *= 16 ;
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- if (mode == 3 || mode == 0 )
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- hw_error ("m5206_timer: mode %d not implemented\n" , mode );
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- if ((s -> tmr & TMR_FRR ) == 0 )
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- hw_error ("m5206_timer: free running mode not implemented\n" );
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+ if (mode == 3 || mode == 0 ) {
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+ qemu_log_mask (LOG_UNIMP , "m5206_timer: mode %d not implemented\n" ,
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+ mode );
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+ goto exit ;
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+ }
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+ if ((s -> tmr & TMR_FRR ) == 0 ) {
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+ qemu_log_mask (LOG_UNIMP ,
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+ "m5206_timer: free running mode not implemented\n" );
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+ goto exit ;
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+ }
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/* Assume 66MHz system clock. */
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ptimer_set_freq (s -> timer , 66000000 / prescale );
@@ -391,7 +396,9 @@ static uint32_t m5206_mbar_readb(void *opaque, hwaddr offset)
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m5206_mbar_state * s = (m5206_mbar_state * )opaque ;
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offset &= 0x3ff ;
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if (offset >= 0x200 ) {
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- hw_error ("Bad MBAR read offset 0x%x" , (int )offset );
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+ qemu_log_mask (LOG_GUEST_ERROR , "Bad MBAR read offset 0x%" HWADDR_PRIX ,
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+ offset );
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+ return 0 ;
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}
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if (m5206_mbar_width [offset >> 2 ] > 1 ) {
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uint16_t val ;
@@ -410,7 +417,9 @@ static uint32_t m5206_mbar_readw(void *opaque, hwaddr offset)
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int width ;
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offset &= 0x3ff ;
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if (offset >= 0x200 ) {
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- hw_error ("Bad MBAR read offset 0x%x" , (int )offset );
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+ qemu_log_mask (LOG_GUEST_ERROR , "Bad MBAR read offset 0x%" HWADDR_PRIX ,
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+ offset );
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+ return 0 ;
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}
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width = m5206_mbar_width [offset >> 2 ];
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if (width > 2 ) {
@@ -434,7 +443,9 @@ static uint32_t m5206_mbar_readl(void *opaque, hwaddr offset)
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int width ;
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offset &= 0x3ff ;
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if (offset >= 0x200 ) {
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- hw_error ("Bad MBAR read offset 0x%x" , (int )offset );
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+ qemu_log_mask (LOG_GUEST_ERROR , "Bad MBAR read offset 0x%" HWADDR_PRIX ,
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+ offset );
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+ return 0 ;
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}
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width = m5206_mbar_width [offset >> 2 ];
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if (width < 4 ) {
@@ -458,7 +469,9 @@ static void m5206_mbar_writeb(void *opaque, hwaddr offset,
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int width ;
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offset &= 0x3ff ;
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if (offset >= 0x200 ) {
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- hw_error ("Bad MBAR write offset 0x%x" , (int )offset );
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+ qemu_log_mask (LOG_GUEST_ERROR , "Bad MBAR write offset 0x%" HWADDR_PRIX ,
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+ offset );
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+ return ;
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}
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width = m5206_mbar_width [offset >> 2 ];
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if (width > 1 ) {
@@ -482,7 +495,9 @@ static void m5206_mbar_writew(void *opaque, hwaddr offset,
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int width ;
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offset &= 0x3ff ;
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if (offset >= 0x200 ) {
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- hw_error ("Bad MBAR write offset 0x%x" , (int )offset );
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+ qemu_log_mask (LOG_GUEST_ERROR , "Bad MBAR write offset 0x%" HWADDR_PRIX ,
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+ offset );
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+ return ;
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}
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width = m5206_mbar_width [offset >> 2 ];
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if (width > 2 ) {
@@ -510,7 +525,9 @@ static void m5206_mbar_writel(void *opaque, hwaddr offset,
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int width ;
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offset &= 0x3ff ;
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if (offset >= 0x200 ) {
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- hw_error ("Bad MBAR write offset 0x%x" , (int )offset );
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+ qemu_log_mask (LOG_GUEST_ERROR , "Bad MBAR write offset 0x%" HWADDR_PRIX ,
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+ offset );
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+ return ;
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}
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width = m5206_mbar_width [offset >> 2 ];
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if (width < 4 ) {
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