target/sparc: Restrict cpu_exec_interrupt() handler to sysemu

philmd · rth7680 · commit 798ac8b5e9f7 · 2021-09-14T12:00:21.000-07:00
Restrict cpu_exec_interrupt() and its callees to sysemu.

Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Warner Losh &lt;imp@bsdimp.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20210911165434.531552-21-f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
@@ -77,6 +77,7 @@ static void sparc_cpu_reset(DeviceState *dev)
     env->cache_control = 0;
 }
 
+#ifndef CONFIG_USER_ONLY
 static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
 {
     if (interrupt_request & CPU_INTERRUPT_HARD) {
@@ -96,6 +97,7 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
     }
     return false;
 }
+#endif /* !CONFIG_USER_ONLY */
 
 static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info)
 {
@@ -863,10 +865,10 @@ static const struct SysemuCPUOps sparc_sysemu_ops = {
 static const struct TCGCPUOps sparc_tcg_ops = {
     .initialize = sparc_tcg_init,
     .synchronize_from_tb = sparc_cpu_synchronize_from_tb,
-    .cpu_exec_interrupt = sparc_cpu_exec_interrupt,
     .tlb_fill = sparc_cpu_tlb_fill,
 
 #ifndef CONFIG_USER_ONLY
+    .cpu_exec_interrupt = sparc_cpu_exec_interrupt,
     .do_interrupt = sparc_cpu_do_interrupt,
     .do_transaction_failed = sparc_cpu_do_transaction_failed,
     .do_unaligned_access = sparc_cpu_do_unaligned_access,

Original file line number	Diff line number	Diff line change
`@@ -77,6 +77,7 @@ static void sparc_cpu_reset(DeviceState *dev)`
`77`	`77`	`env->cache_control = 0;`
`78`	`78`	`}`
`79`	`79`
	`80`	`+#ifndef CONFIG_USER_ONLY`
`80`	`81`	`static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)`
`81`	`82`	`{`
`82`	`83`	`if (interrupt_request & CPU_INTERRUPT_HARD) {`
`@@ -96,6 +97,7 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)`
`96`	`97`	`}`
`97`	`98`	`return false;`
`98`	`99`	`}`
	`100`	`+#endif /* !CONFIG_USER_ONLY */`
`99`	`101`
`100`	`102`	`static void cpu_sparc_disas_set_info(CPUState cpu, disassemble_info info)`
`101`	`103`	`{`
`@@ -863,10 +865,10 @@ static const struct SysemuCPUOps sparc_sysemu_ops = {`
`863`	`865`	`static const struct TCGCPUOps sparc_tcg_ops = {`
`864`	`866`	`.initialize = sparc_tcg_init,`
`865`	`867`	`.synchronize_from_tb = sparc_cpu_synchronize_from_tb,`
`866`		`- .cpu_exec_interrupt = sparc_cpu_exec_interrupt,`
`867`	`868`	`.tlb_fill = sparc_cpu_tlb_fill,`
`868`	`869`
`869`	`870`	`#ifndef CONFIG_USER_ONLY`
	`871`	`+ .cpu_exec_interrupt = sparc_cpu_exec_interrupt,`
`870`	`872`	`.do_interrupt = sparc_cpu_do_interrupt,`
`871`	`873`	`.do_transaction_failed = sparc_cpu_do_transaction_failed,`
`872`	`874`	`.do_unaligned_access = sparc_cpu_do_unaligned_access,`