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#include "hw/timer/cmsdk-apb-timer.h"
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#include "hw/timer/cmsdk-apb-dualtimer.h"
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#include "hw/misc/mps2-scc.h"
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+ #include "hw/misc/mps2-fpgaio.h"
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+ #include "hw/ssi/pl022.h"
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+ #include "hw/i2c/arm_sbcon_i2c.h"
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#include "hw/net/lan9118.h"
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#include "net/net.h"
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+ #include "hw/watchdog/cmsdk-apb-watchdog.h"
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typedef enum MPS2FPGAType {
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FPGA_AN385 ,
@@ -65,8 +69,12 @@ typedef struct {
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MemoryRegion blockram_m2 ;
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MemoryRegion blockram_m3 ;
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MemoryRegion sram ;
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+ /* FPGA APB subsystem */
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MPS2SCC scc ;
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+ MPS2FPGAIO fpgaio ;
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+ /* CMSDK APB subsystem */
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CMSDKAPBDualTimer dualtimer ;
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+ CMSDKAPBWatchdog watchdog ;
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} MPS2MachineState ;
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#define TYPE_MPS2_MACHINE "mps2"
@@ -111,6 +119,7 @@ static void mps2_common_init(MachineState *machine)
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MemoryRegion * system_memory = get_system_memory ();
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MachineClass * mc = MACHINE_GET_CLASS (machine );
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DeviceState * armv7m , * sccdev ;
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+ int i ;
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if (strcmp (machine -> cpu_type , mc -> default_cpu_type ) != 0 ) {
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error_report ("This board can only be used with CPU %s" ,
@@ -210,10 +219,11 @@ static void mps2_common_init(MachineState *machine)
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*/
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create_unimplemented_device ("CMSDK APB peripheral region @0x40000000" ,
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0x40000000 , 0x00010000 );
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- create_unimplemented_device ("CMSDK peripheral region @0x40010000" ,
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+ create_unimplemented_device ("CMSDK AHB peripheral region @0x40010000" ,
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0x40010000 , 0x00010000 );
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create_unimplemented_device ("Extra peripheral region @0x40020000" ,
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0x40020000 , 0x00010000 );
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+
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create_unimplemented_device ("RESERVED 4" , 0x40030000 , 0x001D0000 );
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create_unimplemented_device ("VGA" , 0x41000000 , 0x0200000 );
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@@ -225,7 +235,6 @@ static void mps2_common_init(MachineState *machine)
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*/
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Object * orgate ;
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DeviceState * orgate_dev ;
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- int i ;
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orgate = object_new (TYPE_OR_IRQ );
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object_property_set_int (orgate , 6 , "num-lines" , & error_fatal );
@@ -262,7 +271,6 @@ static void mps2_common_init(MachineState *machine)
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*/
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Object * orgate ;
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DeviceState * orgate_dev ;
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- int i ;
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orgate = object_new (TYPE_OR_IRQ );
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object_property_set_int (orgate , 10 , "num-lines" , & error_fatal );
@@ -298,25 +306,74 @@ static void mps2_common_init(MachineState *machine)
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default :
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g_assert_not_reached ();
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}
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+ for (i = 0 ; i < 4 ; i ++ ) {
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+ static const hwaddr gpiobase [] = {0x40010000 , 0x40011000 ,
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+ 0x40012000 , 0x40013000 };
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+ create_unimplemented_device ("cmsdk-ahb-gpio" , gpiobase [i ], 0x1000 );
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+ }
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+ /* CMSDK APB subsystem */
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cmsdk_apb_timer_create (0x40000000 , qdev_get_gpio_in (armv7m , 8 ), SYSCLK_FRQ );
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cmsdk_apb_timer_create (0x40001000 , qdev_get_gpio_in (armv7m , 9 ), SYSCLK_FRQ );
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-
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object_initialize_child (OBJECT (mms ), "dualtimer" , & mms -> dualtimer ,
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TYPE_CMSDK_APB_DUALTIMER );
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qdev_prop_set_uint32 (DEVICE (& mms -> dualtimer ), "pclk-frq" , SYSCLK_FRQ );
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sysbus_realize (SYS_BUS_DEVICE (& mms -> dualtimer ), & error_fatal );
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sysbus_connect_irq (SYS_BUS_DEVICE (& mms -> dualtimer ), 0 ,
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qdev_get_gpio_in (armv7m , 10 ));
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sysbus_mmio_map (SYS_BUS_DEVICE (& mms -> dualtimer ), 0 , 0x40002000 );
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-
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+ object_initialize_child (OBJECT (mms ), "watchdog" , & mms -> watchdog ,
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+ TYPE_CMSDK_APB_WATCHDOG );
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+ qdev_prop_set_uint32 (DEVICE (& mms -> watchdog ), "wdogclk-frq" , SYSCLK_FRQ );
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+ sysbus_realize (SYS_BUS_DEVICE (& mms -> watchdog ), & error_fatal );
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+ sysbus_connect_irq (SYS_BUS_DEVICE (& mms -> watchdog ), 0 ,
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+ qdev_get_gpio_in_named (armv7m , "NMI" , 0 ));
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+ sysbus_mmio_map (SYS_BUS_DEVICE (& mms -> watchdog ), 0 , 0x40008000 );
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+
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+ /* FPGA APB subsystem */
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object_initialize_child (OBJECT (mms ), "scc" , & mms -> scc , TYPE_MPS2_SCC );
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sccdev = DEVICE (& mms -> scc );
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qdev_prop_set_uint32 (sccdev , "scc-cfg4" , 0x2 );
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qdev_prop_set_uint32 (sccdev , "scc-aid" , 0x00200008 );
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qdev_prop_set_uint32 (sccdev , "scc-id" , mmc -> scc_id );
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sysbus_realize (SYS_BUS_DEVICE (& mms -> scc ), & error_fatal );
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sysbus_mmio_map (SYS_BUS_DEVICE (sccdev ), 0 , 0x4002f000 );
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+ object_initialize_child (OBJECT (mms ), "fpgaio" ,
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+ & mms -> fpgaio , TYPE_MPS2_FPGAIO );
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+ qdev_prop_set_uint32 (DEVICE (& mms -> fpgaio ), "prescale-clk" , 25000000 );
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+ sysbus_realize (SYS_BUS_DEVICE (& mms -> fpgaio ), & error_fatal );
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+ sysbus_mmio_map (SYS_BUS_DEVICE (& mms -> fpgaio ), 0 , 0x40028000 );
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+ sysbus_create_simple (TYPE_PL022 , 0x40025000 , /* External ADC */
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+ qdev_get_gpio_in (armv7m , 22 ));
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+ for (i = 0 ; i < 2 ; i ++ ) {
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+ static const int spi_irqno [] = {11 , 24 };
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+ static const hwaddr spibase [] = {0x40020000 , /* APB */
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+ 0x40021000 , /* LCD */
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+ 0x40026000 , /* Shield0 */
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+ 0x40027000 }; /* Shield1 */
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+ DeviceState * orgate_dev ;
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+ Object * orgate ;
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+ int j ;
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+
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+ orgate = object_new (TYPE_OR_IRQ );
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+ object_property_set_int (orgate , 2 , "num-lines" , & error_fatal );
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+ orgate_dev = DEVICE (orgate );
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+ qdev_realize (orgate_dev , NULL , & error_fatal );
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+ qdev_connect_gpio_out (orgate_dev , 0 ,
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+ qdev_get_gpio_in (armv7m , spi_irqno [i ]));
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+ for (j = 0 ; j < 2 ; j ++ ) {
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+ sysbus_create_simple (TYPE_PL022 , spibase [2 * i + j ],
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+ qdev_get_gpio_in (orgate_dev , j ));
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+ }
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+ }
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+ for (i = 0 ; i < 4 ; i ++ ) {
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+ static const hwaddr i2cbase [] = {0x40022000 , /* Touch */
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+ 0x40023000 , /* Audio */
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+ 0x40029000 , /* Shield0 */
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+ 0x4002a000 }; /* Shield1 */
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+ sysbus_create_simple (TYPE_ARM_SBCON_I2C , i2cbase [i ], NULL );
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+ }
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+ create_unimplemented_device ("i2s" , 0x40024000 , 0x400 );
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/* In hardware this is a LAN9220; the LAN9118 is software compatible
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* except that it doesn't support the checksum-offload feature.
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