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tcg/arm: More use of the TCGReg enum
Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Signed-off-by: Richard Henderson <[email protected]>
1 parent 142fb62 commit e028ead

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+35
-30
lines changed

1 file changed

+35
-30
lines changed

tcg/arm/tcg-target.c.inc

Lines changed: 35 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -559,7 +559,7 @@ static void tcg_out_bl_imm(TCGContext *s, ARMCond cond, int32_t offset)
559559
(((offset - 8) >> 2) & 0x00ffffff));
560560
}
561561

562-
static void tcg_out_blx_reg(TCGContext *s, ARMCond cond, int rn)
562+
static void tcg_out_blx_reg(TCGContext *s, ARMCond cond, TCGReg rn)
563563
{
564564
tcg_out32(s, (cond << 28) | 0x012fff30 | rn);
565565
}
@@ -570,14 +570,14 @@ static void tcg_out_blx_imm(TCGContext *s, int32_t offset)
570570
(((offset - 8) >> 2) & 0x00ffffff));
571571
}
572572

573-
static void tcg_out_dat_reg(TCGContext *s, ARMCond cond, ARMInsn opc, int rd,
574-
int rn, int rm, int shift)
573+
static void tcg_out_dat_reg(TCGContext *s, ARMCond cond, ARMInsn opc,
574+
TCGReg rd, TCGReg rn, TCGReg rm, int shift)
575575
{
576576
tcg_out32(s, (cond << 28) | (0 << 25) | opc |
577577
(rn << 16) | (rd << 12) | shift | rm);
578578
}
579579

580-
static void tcg_out_mov_reg(TCGContext *s, ARMCond cond, int rd, int rm)
580+
static void tcg_out_mov_reg(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rm)
581581
{
582582
/* Simple reg-reg move, optimising out the 'do nothing' case */
583583
if (rd != rm) {
@@ -604,7 +604,7 @@ static void tcg_out_b_reg(TCGContext *s, ARMCond cond, TCGReg rn)
604604
}
605605

606606
static void tcg_out_dat_imm(TCGContext *s, ARMCond cond, ARMInsn opc,
607-
int rd, int rn, int im)
607+
TCGReg rd, TCGReg rn, int im)
608608
{
609609
tcg_out32(s, (cond << 28) | (1 << 25) | opc |
610610
(rn << 16) | (rd << 12) | im);
@@ -788,13 +788,15 @@ static void tcg_out_ld8s_r(TCGContext *s, ARMCond cond, TCGReg rt,
788788
tcg_out_memop_r(s, cond, INSN_LDRSB_REG, rt, rn, rm, 1, 1, 0);
789789
}
790790

791-
static void tcg_out_movi_pool(TCGContext *s, ARMCond cond, int rd, uint32_t arg)
791+
static void tcg_out_movi_pool(TCGContext *s, ARMCond cond,
792+
TCGReg rd, uint32_t arg)
792793
{
793794
new_pool_label(s, arg, R_ARM_PC13, s->code_ptr, 0);
794795
tcg_out_ld32_12(s, cond, rd, TCG_REG_PC, 0);
795796
}
796797

797-
static void tcg_out_movi32(TCGContext *s, ARMCond cond, int rd, uint32_t arg)
798+
static void tcg_out_movi32(TCGContext *s, ARMCond cond,
799+
TCGReg rd, uint32_t arg)
798800
{
799801
int imm12, diff, opc, sh1, sh2;
800802
uint32_t tt0, tt1, tt2;
@@ -873,8 +875,8 @@ static void tcg_out_movi32(TCGContext *s, ARMCond cond, int rd, uint32_t arg)
873875
* Emit either the reg,imm or reg,reg form of a data-processing insn.
874876
* rhs must satisfy the "rI" constraint.
875877
*/
876-
static void tcg_out_dat_rI(TCGContext *s, ARMCond cond, ARMInsn opc, TCGArg dst,
877-
TCGArg lhs, TCGArg rhs, int rhs_is_const)
878+
static void tcg_out_dat_rI(TCGContext *s, ARMCond cond, ARMInsn opc,
879+
TCGReg dst, TCGReg lhs, TCGArg rhs, int rhs_is_const)
878880
{
879881
if (rhs_is_const) {
880882
tcg_out_dat_imm(s, cond, opc, dst, lhs, encode_imm_nofail(rhs));
@@ -904,7 +906,7 @@ static void tcg_out_dat_rIK(TCGContext *s, ARMCond cond, ARMInsn opc,
904906
}
905907

906908
static void tcg_out_dat_rIN(TCGContext *s, ARMCond cond, ARMInsn opc,
907-
ARMInsn opneg, TCGArg dst, TCGArg lhs, TCGArg rhs,
909+
ARMInsn opneg, TCGReg dst, TCGReg lhs, TCGArg rhs,
908910
bool rhs_is_const)
909911
{
910912
/* Emit either the reg,imm or reg,reg form of a data-processing insn.
@@ -978,17 +980,19 @@ static void tcg_out_smull32(TCGContext *s, ARMCond cond, TCGReg rd0,
978980
(rd1 << 16) | (rd0 << 12) | (rm << 8) | rn);
979981
}
980982

981-
static void tcg_out_sdiv(TCGContext *s, ARMCond cond, int rd, int rn, int rm)
983+
static void tcg_out_sdiv(TCGContext *s, ARMCond cond,
984+
TCGReg rd, TCGReg rn, TCGReg rm)
982985
{
983986
tcg_out32(s, 0x0710f010 | (cond << 28) | (rd << 16) | rn | (rm << 8));
984987
}
985988

986-
static void tcg_out_udiv(TCGContext *s, ARMCond cond, int rd, int rn, int rm)
989+
static void tcg_out_udiv(TCGContext *s, ARMCond cond,
990+
TCGReg rd, TCGReg rn, TCGReg rm)
987991
{
988992
tcg_out32(s, 0x0730f010 | (cond << 28) | (rd << 16) | rn | (rm << 8));
989993
}
990994

991-
static void tcg_out_ext8s(TCGContext *s, ARMCond cond, int rd, int rn)
995+
static void tcg_out_ext8s(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
992996
{
993997
if (use_armv6_instructions) {
994998
/* sxtb */
@@ -1002,12 +1006,12 @@ static void tcg_out_ext8s(TCGContext *s, ARMCond cond, int rd, int rn)
10021006
}
10031007

10041008
static void __attribute__((unused))
1005-
tcg_out_ext8u(TCGContext *s, ARMCond cond, int rd, int rn)
1009+
tcg_out_ext8u(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
10061010
{
10071011
tcg_out_dat_imm(s, cond, ARITH_AND, rd, rn, 0xff);
10081012
}
10091013

1010-
static void tcg_out_ext16s(TCGContext *s, ARMCond cond, int rd, int rn)
1014+
static void tcg_out_ext16s(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
10111015
{
10121016
if (use_armv6_instructions) {
10131017
/* sxth */
@@ -1020,7 +1024,7 @@ static void tcg_out_ext16s(TCGContext *s, ARMCond cond, int rd, int rn)
10201024
}
10211025
}
10221026

1023-
static void tcg_out_ext16u(TCGContext *s, ARMCond cond, int rd, int rn)
1027+
static void tcg_out_ext16u(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
10241028
{
10251029
if (use_armv6_instructions) {
10261030
/* uxth */
@@ -1033,7 +1037,8 @@ static void tcg_out_ext16u(TCGContext *s, ARMCond cond, int rd, int rn)
10331037
}
10341038
}
10351039

1036-
static void tcg_out_bswap16(TCGContext *s, ARMCond cond, int rd, int rn, int flags)
1040+
static void tcg_out_bswap16(TCGContext *s, ARMCond cond,
1041+
TCGReg rd, TCGReg rn, int flags)
10371042
{
10381043
if (use_armv6_instructions) {
10391044
if (flags & TCG_BSWAP_OS) {
@@ -1100,7 +1105,7 @@ static void tcg_out_bswap16(TCGContext *s, ARMCond cond, int rd, int rn, int fla
11001105
? SHIFT_IMM_ASR(8) : SHIFT_IMM_LSR(8)));
11011106
}
11021107

1103-
static void tcg_out_bswap32(TCGContext *s, ARMCond cond, int rd, int rn)
1108+
static void tcg_out_bswap32(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
11041109
{
11051110
if (use_armv6_instructions) {
11061111
/* rev */
@@ -1130,23 +1135,23 @@ static void tcg_out_deposit(TCGContext *s, ARMCond cond, TCGReg rd,
11301135
}
11311136

11321137
static void tcg_out_extract(TCGContext *s, ARMCond cond, TCGReg rd,
1133-
TCGArg a1, int ofs, int len)
1138+
TCGReg rn, int ofs, int len)
11341139
{
11351140
/* ubfx */
1136-
tcg_out32(s, 0x07e00050 | (cond << 28) | (rd << 12) | a1
1141+
tcg_out32(s, 0x07e00050 | (cond << 28) | (rd << 12) | rn
11371142
| (ofs << 7) | ((len - 1) << 16));
11381143
}
11391144

11401145
static void tcg_out_sextract(TCGContext *s, ARMCond cond, TCGReg rd,
1141-
TCGArg a1, int ofs, int len)
1146+
TCGReg rn, int ofs, int len)
11421147
{
11431148
/* sbfx */
1144-
tcg_out32(s, 0x07a00050 | (cond << 28) | (rd << 12) | a1
1149+
tcg_out32(s, 0x07a00050 | (cond << 28) | (rd << 12) | rn
11451150
| (ofs << 7) | ((len - 1) << 16));
11461151
}
11471152

11481153
static void tcg_out_ld32u(TCGContext *s, ARMCond cond,
1149-
int rd, int rn, int32_t offset)
1154+
TCGReg rd, TCGReg rn, int32_t offset)
11501155
{
11511156
if (offset > 0xfff || offset < -0xfff) {
11521157
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1156,7 +1161,7 @@ static void tcg_out_ld32u(TCGContext *s, ARMCond cond,
11561161
}
11571162

11581163
static void tcg_out_st32(TCGContext *s, ARMCond cond,
1159-
int rd, int rn, int32_t offset)
1164+
TCGReg rd, TCGReg rn, int32_t offset)
11601165
{
11611166
if (offset > 0xfff || offset < -0xfff) {
11621167
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1166,7 +1171,7 @@ static void tcg_out_st32(TCGContext *s, ARMCond cond,
11661171
}
11671172

11681173
static void tcg_out_ld16u(TCGContext *s, ARMCond cond,
1169-
int rd, int rn, int32_t offset)
1174+
TCGReg rd, TCGReg rn, int32_t offset)
11701175
{
11711176
if (offset > 0xff || offset < -0xff) {
11721177
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1176,7 +1181,7 @@ static void tcg_out_ld16u(TCGContext *s, ARMCond cond,
11761181
}
11771182

11781183
static void tcg_out_ld16s(TCGContext *s, ARMCond cond,
1179-
int rd, int rn, int32_t offset)
1184+
TCGReg rd, TCGReg rn, int32_t offset)
11801185
{
11811186
if (offset > 0xff || offset < -0xff) {
11821187
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1186,7 +1191,7 @@ static void tcg_out_ld16s(TCGContext *s, ARMCond cond,
11861191
}
11871192

11881193
static void tcg_out_st16(TCGContext *s, ARMCond cond,
1189-
int rd, int rn, int32_t offset)
1194+
TCGReg rd, TCGReg rn, int32_t offset)
11901195
{
11911196
if (offset > 0xff || offset < -0xff) {
11921197
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1196,7 +1201,7 @@ static void tcg_out_st16(TCGContext *s, ARMCond cond,
11961201
}
11971202

11981203
static void tcg_out_ld8u(TCGContext *s, ARMCond cond,
1199-
int rd, int rn, int32_t offset)
1204+
TCGReg rd, TCGReg rn, int32_t offset)
12001205
{
12011206
if (offset > 0xfff || offset < -0xfff) {
12021207
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1206,7 +1211,7 @@ static void tcg_out_ld8u(TCGContext *s, ARMCond cond,
12061211
}
12071212

12081213
static void tcg_out_ld8s(TCGContext *s, ARMCond cond,
1209-
int rd, int rn, int32_t offset)
1214+
TCGReg rd, TCGReg rn, int32_t offset)
12101215
{
12111216
if (offset > 0xff || offset < -0xff) {
12121217
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);
@@ -1216,7 +1221,7 @@ static void tcg_out_ld8s(TCGContext *s, ARMCond cond,
12161221
}
12171222

12181223
static void tcg_out_st8(TCGContext *s, ARMCond cond,
1219-
int rd, int rn, int32_t offset)
1224+
TCGReg rd, TCGReg rn, int32_t offset)
12201225
{
12211226
if (offset > 0xfff || offset < -0xfff) {
12221227
tcg_out_movi32(s, cond, TCG_REG_TMP, offset);

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