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LIU Zhiweialistair23
LIU Zhiwei
authored and
alistair23
committed
target/riscv: vector slide instructions
Signed-off-by: LIU Zhiwei <[email protected]> Reviewed-by: Richard Henderson <[email protected]> Message-Id: <[email protected]> Signed-off-by: Alistair Francis <[email protected]>
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‎target/riscv/helper.h‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1119,3 +1119,20 @@ DEF_HELPER_4(vid_v_b, void, ptr, ptr, env, i32)
11191119
DEF_HELPER_4(vid_v_h, void, ptr, ptr, env, i32)
11201120
DEF_HELPER_4(vid_v_w, void, ptr, ptr, env, i32)
11211121
DEF_HELPER_4(vid_v_d, void, ptr, ptr, env, i32)
1122+
1123+
DEF_HELPER_6(vslideup_vx_b, void, ptr, ptr, tl, ptr, env, i32)
1124+
DEF_HELPER_6(vslideup_vx_h, void, ptr, ptr, tl, ptr, env, i32)
1125+
DEF_HELPER_6(vslideup_vx_w, void, ptr, ptr, tl, ptr, env, i32)
1126+
DEF_HELPER_6(vslideup_vx_d, void, ptr, ptr, tl, ptr, env, i32)
1127+
DEF_HELPER_6(vslidedown_vx_b, void, ptr, ptr, tl, ptr, env, i32)
1128+
DEF_HELPER_6(vslidedown_vx_h, void, ptr, ptr, tl, ptr, env, i32)
1129+
DEF_HELPER_6(vslidedown_vx_w, void, ptr, ptr, tl, ptr, env, i32)
1130+
DEF_HELPER_6(vslidedown_vx_d, void, ptr, ptr, tl, ptr, env, i32)
1131+
DEF_HELPER_6(vslide1up_vx_b, void, ptr, ptr, tl, ptr, env, i32)
1132+
DEF_HELPER_6(vslide1up_vx_h, void, ptr, ptr, tl, ptr, env, i32)
1133+
DEF_HELPER_6(vslide1up_vx_w, void, ptr, ptr, tl, ptr, env, i32)
1134+
DEF_HELPER_6(vslide1up_vx_d, void, ptr, ptr, tl, ptr, env, i32)
1135+
DEF_HELPER_6(vslide1down_vx_b, void, ptr, ptr, tl, ptr, env, i32)
1136+
DEF_HELPER_6(vslide1down_vx_h, void, ptr, ptr, tl, ptr, env, i32)
1137+
DEF_HELPER_6(vslide1down_vx_w, void, ptr, ptr, tl, ptr, env, i32)
1138+
DEF_HELPER_6(vslide1down_vx_d, void, ptr, ptr, tl, ptr, env, i32)

‎target/riscv/insn32.decode‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -568,6 +568,12 @@ vext_x_v 001100 1 ..... ..... 010 ..... 1010111 @r
568568
vmv_s_x 001101 1 00000 ..... 110 ..... 1010111 @r2
569569
vfmv_f_s 001100 1 ..... 00000 001 ..... 1010111 @r2rd
570570
vfmv_s_f 001101 1 00000 ..... 101 ..... 1010111 @r2
571+
vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm
572+
vslideup_vi 001110 . ..... ..... 011 ..... 1010111 @r_vm
573+
vslide1up_vx 001110 . ..... ..... 110 ..... 1010111 @r_vm
574+
vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 @r_vm
575+
vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm
576+
vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm
571577

572578
vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm
573579
vsetvl 1000000 ..... ..... 111 ..... 1010111 @r

‎target/riscv/insn_trans/trans_rvv.inc.c‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2758,3 +2758,21 @@ static bool trans_vfmv_s_f(DisasContext *s, arg_vfmv_s_f *a)
27582758
}
27592759
return false;
27602760
}
2761+
2762+
/* Vector Slide Instructions */
2763+
static bool slideup_check(DisasContext *s, arg_rmrr *a)
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{
2765+
return (vext_check_isa_ill(s) &&
2766+
vext_check_overlap_mask(s, a->rd, a->vm, true) &&
2767+
vext_check_reg(s, a->rd, false) &&
2768+
vext_check_reg(s, a->rs2, false) &&
2769+
(a->rd != a->rs2));
2770+
}
2771+
2772+
GEN_OPIVX_TRANS(vslideup_vx, slideup_check)
2773+
GEN_OPIVX_TRANS(vslide1up_vx, slideup_check)
2774+
GEN_OPIVI_TRANS(vslideup_vi, 1, vslideup_vx, slideup_check)
2775+
2776+
GEN_OPIVX_TRANS(vslidedown_vx, opivx_check)
2777+
GEN_OPIVX_TRANS(vslide1down_vx, opivx_check)
2778+
GEN_OPIVI_TRANS(vslidedown_vi, 1, vslidedown_vx, opivx_check)

‎target/riscv/vector_helper.c‎

Lines changed: 114 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4697,3 +4697,117 @@ GEN_VEXT_VID_V(vid_v_b, uint8_t, H1, clearb)
46974697
GEN_VEXT_VID_V(vid_v_h, uint16_t, H2, clearh)
46984698
GEN_VEXT_VID_V(vid_v_w, uint32_t, H4, clearl)
46994699
GEN_VEXT_VID_V(vid_v_d, uint64_t, H8, clearq)
4700+
4701+
/*
4702+
*** Vector Permutation Instructions
4703+
*/
4704+
4705+
/* Vector Slide Instructions */
4706+
#define GEN_VEXT_VSLIDEUP_VX(NAME, ETYPE, H, CLEAR_FN) \
4707+
void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
4708+
CPURISCVState *env, uint32_t desc) \
4709+
{ \
4710+
uint32_t mlen = vext_mlen(desc); \
4711+
uint32_t vlmax = env_archcpu(env)->cfg.vlen / mlen; \
4712+
uint32_t vm = vext_vm(desc); \
4713+
uint32_t vl = env->vl; \
4714+
target_ulong offset = s1, i; \
4715+
\
4716+
for (i = offset; i < vl; i++) { \
4717+
if (!vm && !vext_elem_mask(v0, mlen, i)) { \
4718+
continue; \
4719+
} \
4720+
*((ETYPE *)vd + H(i)) = *((ETYPE *)vs2 + H(i - offset)); \
4721+
} \
4722+
CLEAR_FN(vd, vl, vl * sizeof(ETYPE), vlmax * sizeof(ETYPE)); \
4723+
}
4724+
4725+
/* vslideup.vx vd, vs2, rs1, vm # vd[i+rs1] = vs2[i] */
4726+
GEN_VEXT_VSLIDEUP_VX(vslideup_vx_b, uint8_t, H1, clearb)
4727+
GEN_VEXT_VSLIDEUP_VX(vslideup_vx_h, uint16_t, H2, clearh)
4728+
GEN_VEXT_VSLIDEUP_VX(vslideup_vx_w, uint32_t, H4, clearl)
4729+
GEN_VEXT_VSLIDEUP_VX(vslideup_vx_d, uint64_t, H8, clearq)
4730+
4731+
#define GEN_VEXT_VSLIDEDOWN_VX(NAME, ETYPE, H, CLEAR_FN) \
4732+
void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
4733+
CPURISCVState *env, uint32_t desc) \
4734+
{ \
4735+
uint32_t mlen = vext_mlen(desc); \
4736+
uint32_t vlmax = env_archcpu(env)->cfg.vlen / mlen; \
4737+
uint32_t vm = vext_vm(desc); \
4738+
uint32_t vl = env->vl; \
4739+
target_ulong offset = s1, i; \
4740+
\
4741+
for (i = 0; i < vl; ++i) { \
4742+
target_ulong j = i + offset; \
4743+
if (!vm && !vext_elem_mask(v0, mlen, i)) { \
4744+
continue; \
4745+
} \
4746+
*((ETYPE *)vd + H(i)) = j >= vlmax ? 0 : *((ETYPE *)vs2 + H(j)); \
4747+
} \
4748+
CLEAR_FN(vd, vl, vl * sizeof(ETYPE), vlmax * sizeof(ETYPE)); \
4749+
}
4750+
4751+
/* vslidedown.vx vd, vs2, rs1, vm # vd[i] = vs2[i+rs1] */
4752+
GEN_VEXT_VSLIDEDOWN_VX(vslidedown_vx_b, uint8_t, H1, clearb)
4753+
GEN_VEXT_VSLIDEDOWN_VX(vslidedown_vx_h, uint16_t, H2, clearh)
4754+
GEN_VEXT_VSLIDEDOWN_VX(vslidedown_vx_w, uint32_t, H4, clearl)
4755+
GEN_VEXT_VSLIDEDOWN_VX(vslidedown_vx_d, uint64_t, H8, clearq)
4756+
4757+
#define GEN_VEXT_VSLIDE1UP_VX(NAME, ETYPE, H, CLEAR_FN) \
4758+
void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
4759+
CPURISCVState *env, uint32_t desc) \
4760+
{ \
4761+
uint32_t mlen = vext_mlen(desc); \
4762+
uint32_t vlmax = env_archcpu(env)->cfg.vlen / mlen; \
4763+
uint32_t vm = vext_vm(desc); \
4764+
uint32_t vl = env->vl; \
4765+
uint32_t i; \
4766+
\
4767+
for (i = 0; i < vl; i++) { \
4768+
if (!vm && !vext_elem_mask(v0, mlen, i)) { \
4769+
continue; \
4770+
} \
4771+
if (i == 0) { \
4772+
*((ETYPE *)vd + H(i)) = s1; \
4773+
} else { \
4774+
*((ETYPE *)vd + H(i)) = *((ETYPE *)vs2 + H(i - 1)); \
4775+
} \
4776+
} \
4777+
CLEAR_FN(vd, vl, vl * sizeof(ETYPE), vlmax * sizeof(ETYPE)); \
4778+
}
4779+
4780+
/* vslide1up.vx vd, vs2, rs1, vm # vd[0]=x[rs1], vd[i+1] = vs2[i] */
4781+
GEN_VEXT_VSLIDE1UP_VX(vslide1up_vx_b, uint8_t, H1, clearb)
4782+
GEN_VEXT_VSLIDE1UP_VX(vslide1up_vx_h, uint16_t, H2, clearh)
4783+
GEN_VEXT_VSLIDE1UP_VX(vslide1up_vx_w, uint32_t, H4, clearl)
4784+
GEN_VEXT_VSLIDE1UP_VX(vslide1up_vx_d, uint64_t, H8, clearq)
4785+
4786+
#define GEN_VEXT_VSLIDE1DOWN_VX(NAME, ETYPE, H, CLEAR_FN) \
4787+
void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
4788+
CPURISCVState *env, uint32_t desc) \
4789+
{ \
4790+
uint32_t mlen = vext_mlen(desc); \
4791+
uint32_t vlmax = env_archcpu(env)->cfg.vlen / mlen; \
4792+
uint32_t vm = vext_vm(desc); \
4793+
uint32_t vl = env->vl; \
4794+
uint32_t i; \
4795+
\
4796+
for (i = 0; i < vl; i++) { \
4797+
if (!vm && !vext_elem_mask(v0, mlen, i)) { \
4798+
continue; \
4799+
} \
4800+
if (i == vl - 1) { \
4801+
*((ETYPE *)vd + H(i)) = s1; \
4802+
} else { \
4803+
*((ETYPE *)vd + H(i)) = *((ETYPE *)vs2 + H(i + 1)); \
4804+
} \
4805+
} \
4806+
CLEAR_FN(vd, vl, vl * sizeof(ETYPE), vlmax * sizeof(ETYPE)); \
4807+
}
4808+
4809+
/* vslide1down.vx vd, vs2, rs1, vm # vd[i] = vs2[i+1], vd[vl-1]=x[rs1] */
4810+
GEN_VEXT_VSLIDE1DOWN_VX(vslide1down_vx_b, uint8_t, H1, clearb)
4811+
GEN_VEXT_VSLIDE1DOWN_VX(vslide1down_vx_h, uint16_t, H2, clearh)
4812+
GEN_VEXT_VSLIDE1DOWN_VX(vslide1down_vx_w, uint32_t, H4, clearl)
4813+
GEN_VEXT_VSLIDE1DOWN_VX(vslide1down_vx_d, uint64_t, H8, clearq)

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