1- export var vector_table linksection (".vector_table" ) = packed struct {
1+ export var vector_table linksection (".vector_table" ) = extern struct {
22 initial_sp : u32 = model .memory .ram .stack_bottom ,
33 reset : EntryPoint = reset ,
44 system_exceptions : [14 ]EntryPoint = [1 ]EntryPoint {exception } ** 14 ,
55 interrupts : [model .number_of_peripherals ]EntryPoint = [1 ]EntryPoint {exception } ** model .number_of_peripherals ,
6- const EntryPoint = fn () callconv (.C ) noreturn ;
6+ const EntryPoint = * const fn () callconv (.C ) noreturn ;
77}{};
88
99fn reset () callconv (.C ) noreturn {
10+ model .memory .ram .prepare ();
11+ Uart .prepare ();
12+ log ("https://github.com/markfirmware/zig-vector-table is running on a microbit!" , .{});
13+ while (true ) {
14+ Uart .update ();
15+ }
16+ }
17+
18+ fn reset2 () callconv (.C ) noreturn {
1019 model .memory .ram .prepare ();
1120 Uart .prepare ();
1221 Timers [0 ].prepare ();
@@ -46,8 +55,9 @@ fn exception() callconv(.C) noreturn {
4655 panicf ("arm exception ipsr.isr_number {}" , .{isr_number });
4756}
4857
49- pub fn panic (message : []const u8 , trace : ? * std.builtin.StackTrace ) noreturn {
58+ pub fn panic (message : []const u8 , trace : ? * std.builtin.StackTrace , status_code : ? usize ) noreturn {
5059 _ = trace ;
60+ _ = status_code ;
5161 panicf ("panic(): {s}" , .{message });
5262}
5363
@@ -70,7 +80,7 @@ const Ficr = struct {
7080 pub fn isQemu () bool {
7181 return deviceId () == 0x1234567800000003 ;
7282 }
73- pub const contents = @intToPtr (* [64 ]u32 , 0x10000000 );
83+ pub const contents = @as (* [64 ]u32 , @ptrFromInt ( 0x10000000 ) );
7484};
7585
7686const Gpio = struct {
@@ -94,19 +104,19 @@ const Gpio = struct {
94104};
95105
96106const Peripheral = struct {
97- fn at (base : u32 ) type {
107+ fn at (comptime base : u32 ) type {
98108 assert (base == 0xe000e000 or base == 0x50000000 or base & 0xfffe0fff == 0x40000000 );
99109 return struct {
100110 const peripheral_id = base >> 12 & 0x1f ;
101111 fn mmio (address : u32 , comptime T : type ) * align (4 ) volatile T {
102- return @intToPtr (* align (4 ) volatile T , address );
112+ return @as (* align (4 ) volatile T , @ptrFromInt ( address ) );
103113 }
104114 fn event (offset : u32 ) Event {
105115 var e : Event = undefined ;
106116 e .address = base + offset ;
107117 return e ;
108118 }
109- fn typedRegister (offset : u32 , comptime the_layout : type ) type {
119+ fn typedRegister (comptime offset : u32 , comptime the_layout : type ) type {
110120 return struct {
111121 pub const layout = the_layout ;
112122 pub noinline fn read () layout {
@@ -117,7 +127,7 @@ const Peripheral = struct {
117127 }
118128 };
119129 }
120- fn register (offset : u32 ) type {
130+ fn register (comptime offset : u32 ) type {
121131 return typedRegister (offset , u32 );
122132 }
123133 fn registerGroup (offsets : RegisterGroup ) type {
@@ -277,19 +287,19 @@ pub const Pins = packed struct {
277287 }
278288 pub fn mask (self : Pins ) u32 {
279289 assert (@sizeOf (Pins ) == 4 );
280- return @bitCast (u32 , self );
290+ return @bitCast (self );
281291 }
282292 pub fn maskUnion (self : Pins , other : Pins ) Pins {
283- return @bitCast (Pins , self .mask () | other .mask ());
293+ return @bitCast (self .mask () | other .mask ());
284294 }
285295 pub fn outRead (self : Pins ) u32 {
286- return (@bitCast (u32 , Gpio .registers .out .read ()) & self .mask ()) >> self .bitPosition (0 );
296+ return (@as (u32 , @bitCast ( Gpio .registers .out .read () )) & self .mask ()) >> self .bitPosition (0 );
287297 }
288298 fn bitPosition (self : Pins , i : u32 ) u5 {
289- return @truncate (u5 , @ctz (self .mask ()) + i );
299+ return @truncate (@ctz (self .mask ()) + i );
290300 }
291301 pub fn read (self : Pins ) u32 {
292- return (@bitCast (u32 , Gpio .registers .in .read ()) & self .mask ()) >> self .bitPosition (0 );
302+ return (@as (u32 , @bitCast ( Gpio .registers .in .read () )) & self .mask ()) >> self .bitPosition (0 );
293303 }
294304 pub fn set (self : Pins ) void {
295305 Gpio .registers .out .set (self );
@@ -300,7 +310,7 @@ pub const Pins = packed struct {
300310 pub fn write (self : Pins , x : u32 ) void {
301311 var new = Gpio .registers .out .read ().mask () & ~ self .mask ();
302312 new |= (x << self .bitPosition (0 )) & self .mask ();
303- Gpio .registers .out .write (@bitCast (Pins , new ));
313+ Gpio .registers .out .write (@bitCast (new ));
304314 }
305315 pub fn writeWholeMask (self : Pins ) void {
306316 Gpio .registers .out .write (self );
@@ -420,7 +430,7 @@ pub const TimeKeeper = struct {
420430
421431pub const Timers = [_ ]@TypeOf (Timer (0x40008000 )){ Timer (0x40008000 ), Timer (0x40009000 ), Timer (0x4000a000 ) };
422432
423- fn Timer (base : u32 ) type {
433+ fn Timer (comptime base : u32 ) type {
424434 return struct {
425435 const max_width = if (base == 0x40008000 ) @as (u32 , 32 ) else 16 ;
426436 const p = Peripheral .at (base );
@@ -505,7 +515,7 @@ const Uart = struct {
505515 var tx_queue : [3 ]u8 = undefined ;
506516 var tx_queue_read : usize = undefined ;
507517 var tx_queue_write : usize = undefined ;
508- var updater : ? fn () void = undefined ;
518+ var updater : ? * fn () void = null ;
509519 pub fn drainTx () void {
510520 while (tx_queue_read != tx_queue_write ) {
511521 loadTxd ();
@@ -531,9 +541,7 @@ const Uart = struct {
531541 registers .txd .write (tx_queue [tx_queue_read ]);
532542 tx_queue_read = (tx_queue_read + 1 ) % tx_queue .len ;
533543 tx_busy = true ;
534- if (updater ) | an_updater | {
535- an_updater ();
536- }
544+ updater .? ();
537545 }
538546 }
539547 pub fn log (comptime fmt : []const u8 , args : anytype ) void {
@@ -567,7 +575,7 @@ const Uart = struct {
567575 }
568576 pub fn readByte () u8 {
569577 events .rx_ready .clearEvent ();
570- return @truncate (u8 , registers .rxd .read ());
578+ return @truncate (registers .rxd .read ());
571579 }
572580};
573581
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