[CGP] Disable optimizeMemoryInst only for EraVM

This enables optimization for EVM and implements
isLegalAddressingMode, allowing r + imm addressing
mode for all address spaces except CALLDATALOAD.
Benchmarks indicate that enabling it for CALLDATALOAD
is not beneficial. This change primarily allows
address mode calculations (r + imm) to be sunk
to their uses, which can reduce spills and
reloads in some cases.

Signed-off-by: Vladimir Radosavljevic <[email protected]>

Author: vladimirradosavljevic

llvm/lib/Target/EVM/EVMISelLowering.cpp

@@ -110,6 +110,25 @@ const char *EVMTargetLowering::getTargetNodeName(unsigned Opcode) const {
   return nullptr;
 }
 
+bool EVMTargetLowering::isLegalAddressingMode(const DataLayout &DL,
+                                              const AddrMode &AM, Type *Ty,
+                                              unsigned AS,
+                                              Instruction *I) const {
+  // We don't support global and scaled addresses.
+  if (AM.BaseGV || AM.Scale)
+    return false;
+
+  // For CALLDATALOAD, benchmark numbers showed it is not profitable to set
+  // that we support r + imm.
+  if (AS == EVMAS::AS_CALL_DATA)
+    return !(AM.HasBaseReg && AM.BaseOffs);
+
+  // Allow r + imm addressing mode for other address spaces. This can help
+  // to reduce register pressure by sinking add with immediate to its uses,
+  // minimizing the need for extra registers and reducing spills and reloads.
+  return true;
+}
+
 //===----------------------------------------------------------------------===//
 // EVM Lowering private implementation.
 //===----------------------------------------------------------------------===//

llvm/lib/Target/EVM/EVMISelLowering.h

@@ -40,6 +40,10 @@ class EVMTargetLowering final : public TargetLowering {
   /// DAG node.
   const char *getTargetNodeName(unsigned Opcode) const override;
 
+  bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
+                             unsigned AS,
+                             Instruction *I = nullptr) const override;
+
   EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
                          EVT VT) const override {
     return MVT::i256;

llvm/test/CodeGen/EVM/cgp-sink-addrmode.ll

@@ -10,11 +10,11 @@ define i256 @test_as1(i256 %arg) {
 ; CHECK-LABEL: define i256 @test_as1(
 ; CHECK-SAME: i256 [[ARG:%.*]]) {
 ; CHECK-NEXT:  [[ENTRY:.*]]:
-; CHECK-NEXT:    [[ADD:%.*]] = add i256 [[ARG]], 4
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i256 [[ARG]], 10
 ; CHECK-NEXT:    br i1 [[CMP]], label %[[THEN:.*]], label %[[EXIT:.*]]
 ; CHECK:       [[THEN]]:
-; CHECK-NEXT:    [[INTTOPTR:%.*]] = inttoptr i256 [[ADD]] to ptr addrspace(1)
+; CHECK-NEXT:    [[SUNKADDR:%.*]] = inttoptr i256 [[ARG]] to ptr addrspace(1)
+; CHECK-NEXT:    [[INTTOPTR:%.*]] = getelementptr i8, ptr addrspace(1) [[SUNKADDR]], i256 4
 ; CHECK-NEXT:    [[LOAD:%.*]] = load i256, ptr addrspace(1) [[INTTOPTR]], align 1
 ; CHECK-NEXT:    br label %[[EXIT]]
 ; CHECK:       [[EXIT]]:
@@ -40,11 +40,11 @@ define i256 @test_as5(i256 %arg) {
 ; CHECK-LABEL: define i256 @test_as5(
 ; CHECK-SAME: i256 [[ARG:%.*]]) {
 ; CHECK-NEXT:  [[ENTRY:.*]]:
-; CHECK-NEXT:    [[ADD:%.*]] = add i256 [[ARG]], 4
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i256 [[ARG]], 10
 ; CHECK-NEXT:    br i1 [[CMP]], label %[[THEN:.*]], label %[[EXIT:.*]]
 ; CHECK:       [[THEN]]:
-; CHECK-NEXT:    [[INTTOPTR:%.*]] = inttoptr i256 [[ADD]] to ptr addrspace(5)
+; CHECK-NEXT:    [[SUNKADDR:%.*]] = inttoptr i256 [[ARG]] to ptr addrspace(5)
+; CHECK-NEXT:    [[INTTOPTR:%.*]] = getelementptr i8, ptr addrspace(5) [[SUNKADDR]], i256 4
 ; CHECK-NEXT:    [[LOAD:%.*]] = load i256, ptr addrspace(5) [[INTTOPTR]], align 1
 ; CHECK-NEXT:    br label %[[EXIT]]
 ; CHECK:       [[EXIT]]: