[EVM][ISel] Improve BYTE instruction selection

PavelKopyl · PavelKopyl · commit 33f0078d6169 · 2025-07-29T00:49:39.000+02:00
This replaces 'AND (SRL imm, v), 0xFF' -> 'BYTE (31 - imm / 8), v', where imm % 8 == 0, and imm / 8 < 32. Fixes issue #824.
diff --git a/llvm/lib/Target/EVM/EVMInstrInfo.td b/llvm/lib/Target/EVM/EVMInstrInfo.td
@@ -125,6 +125,18 @@ def negate_imm : SDNodeXForm<imm, [{
   return CurDAG->getTargetConstant(-neg, SDLoc(N), MVT::i256);
 }]>;
 
+// Transform that maps the shift amount to BYTE‘s index (31 - Val / 8).
+def byte_shift : SDNodeXForm<imm, [{
+  uint64_t Val = cast<ConstantSDNode>(N)->getZExtValue();
+  uint64_t ByteIdx = Val / 8;
+  return CurDAG->getTargetConstant(31 - ByteIdx, SDLoc(N), MVT::i256);
+}]>;
+
+// Immediate predicate: imm divisible by 8 and within [0, 31 * 8].
+def byte_shift_imm : PatLeaf<(imm), [{
+  uint64_t Val = N->getZExtValue();
+  return (Val % 8) == 0 && Val <= 31 * 8;
+}]>;
 
 //===----------------------------------------------------------------------===//
 // Pattern fragments for memory instructions.
@@ -351,6 +363,24 @@ defm BYTE
       [(set GPR:$dst, (int_evm_byte GPR:$idx, GPR:$val))],
       "BYTE", "$dst, $idx, $val", 0x1a, 3>;
 
+def : Pat<(and (srl i256:$val, byte_shift_imm:$sh), (i256 255)),
+          (BYTE (CONST_I256 (byte_shift byte_shift_imm:$sh)), $val)>;
+
+// When the shift amount is 248, the node 'AND $val, 255' gets optimized away
+// in the lowered SelectionDAG, preventing the above pattern from matching
+// which results to the following instructions:
+//
+//   PUSH1 0xF8
+//   SHR
+//
+// However, using the BYTE instruction instead is often both cheaper in gas
+// and uses one less byte:
+//
+//   PUSH0
+//   BYTE
+//
+// So we explicitly match this case with a separate pattern:
+def : Pat<(srl i256:$val, (i256 248)), (BYTE (CONST_I256 0), $val)>;
 
 //===----------------------------------------------------------------------===//
 // EVM shift instructions.
diff --git a/llvm/test/CodeGen/EVM/bitmanipulation-intrinsics.ll b/llvm/test/CodeGen/EVM/bitmanipulation-intrinsics.ll
@@ -15,8 +15,8 @@ define i256 @bitreversetest(i256 %v) {
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    JUMPDEST
 ; CHECK-NEXT:    DUP1
-; CHECK-NEXT:    PUSH1 0xF8
-; CHECK-NEXT:    SHR
+; CHECK-NEXT:    PUSH0
+; CHECK-NEXT:    BYTE
 ; CHECK-NEXT:    PUSH2 0xFF00
 ; CHECK-NEXT:    DUP3
 ; CHECK-NEXT:    PUSH1 0xE8
@@ -280,8 +280,8 @@ define i256 @bswaptest(i256 %v) {
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    JUMPDEST
 ; CHECK-NEXT:    DUP1
-; CHECK-NEXT:    PUSH1 0xF8
-; CHECK-NEXT:    SHR
+; CHECK-NEXT:    PUSH0
+; CHECK-NEXT:    BYTE
 ; CHECK-NEXT:    PUSH2 0xFF00
 ; CHECK-NEXT:    DUP3
 ; CHECK-NEXT:    PUSH1 0xE8
@@ -511,17 +511,15 @@ define i256 @ctpoptest(i256 %v) {
 ; CHECK-LABEL: ctpoptest:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    JUMPDEST
-; CHECK-NEXT:    PUSH1 0xFF
 ; CHECK-NEXT:    PUSH32 0x101010101010101010101010101010101010101010101010101010101010101
 ; CHECK-NEXT:    PUSH16 0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F
-; CHECK-NEXT:    DUP3
-; CHECK-NEXT:    DUP3
-; CHECK-NEXT:    DUP3
+; CHECK-NEXT:    DUP2
+; CHECK-NEXT:    DUP2
 ; CHECK-NEXT:    PUSH32 0x3333333333333333333333333333333333333333333333333333333333333333
-; CHECK-NEXT:    DUP8
+; CHECK-NEXT:    DUP6
 ; CHECK-NEXT:    PUSH16 0x55555555555555555555555555555555
 ; CHECK-NEXT:    DUP1
-; CHECK-NEXT:    SWAP10
+; CHECK-NEXT:    SWAP8
 ; CHECK-NEXT:    PUSH1 0x81
 ; CHECK-NEXT:    SHR
 ; CHECK-NEXT:    AND
@@ -538,7 +536,7 @@ define i256 @ctpoptest(i256 %v) {
 ; CHECK-NEXT:    SWAP2
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    ADD
-; CHECK-NEXT:    SWAP9
+; CHECK-NEXT:    SWAP7
 ; CHECK-NEXT:    DUP2
 ; CHECK-NEXT:    PUSH1 0x1
 ; CHECK-NEXT:    SHR
@@ -556,26 +554,24 @@ define i256 @ctpoptest(i256 %v) {
 ; CHECK-NEXT:    SWAP2
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    ADD
-; CHECK-NEXT:    SWAP7
+; CHECK-NEXT:    SWAP5
 ; CHECK-NEXT:    DUP1
 ; CHECK-NEXT:    PUSH1 0x4
 ; CHECK-NEXT:    SHR
 ; CHECK-NEXT:    ADD
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    MUL
-; CHECK-NEXT:    PUSH1 0x78
-; CHECK-NEXT:    SHR
-; CHECK-NEXT:    AND
-; CHECK-NEXT:    SWAP4
+; CHECK-NEXT:    PUSH1 0x10
+; CHECK-NEXT:    BYTE
+; CHECK-NEXT:    SWAP3
 ; CHECK-NEXT:    DUP1
 ; CHECK-NEXT:    PUSH1 0x4
 ; CHECK-NEXT:    SHR
 ; CHECK-NEXT:    ADD
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    MUL
-; CHECK-NEXT:    PUSH1 0x78
-; CHECK-NEXT:    SHR
-; CHECK-NEXT:    AND
+; CHECK-NEXT:    PUSH1 0x10
+; CHECK-NEXT:    BYTE
 ; CHECK-NEXT:    ADD
 ; CHECK-NEXT:    SWAP1
 ; CHECK-NEXT:    JUMP
@@ -588,16 +584,14 @@ define i256 @ctlztest(i256 %v) {
 ; CHECK-LABEL: ctlztest:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    JUMPDEST
-; CHECK-NEXT:    PUSH1 0xFF
 ; CHECK-NEXT:    PUSH32 0x101010101010101010101010101010101010101010101010101010101010101
 ; CHECK-NEXT:    PUSH16 0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F
-; CHECK-NEXT:    DUP3
-; CHECK-NEXT:    DUP3
-; CHECK-NEXT:    DUP3
+; CHECK-NEXT:    DUP2
+; CHECK-NEXT:    DUP2
 ; CHECK-NEXT:    PUSH32 0x3333333333333333333333333333333333333333333333333333333333333333
-; CHECK-NEXT:    DUP8
+; CHECK-NEXT:    DUP6
 ; CHECK-NEXT:    PUSH16 0x55555555555555555555555555555555
-; CHECK-NEXT:    SWAP9
+; CHECK-NEXT:    SWAP7
 ; CHECK-NEXT:    PUSH1 0x1
 ; CHECK-NEXT:    SHR
 ; CHECK-NEXT:    OR
@@ -631,7 +625,7 @@ define i256 @ctlztest(i256 %v) {
 ; CHECK-NEXT:    OR
 ; CHECK-NEXT:    NOT
 ; CHECK-NEXT:    PUSH16 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
-; CHECK-NEXT:    DUP10
+; CHECK-NEXT:    DUP8
 ; CHECK-NEXT:    DUP3
 ; CHECK-NEXT:    PUSH1 0x81
 ; CHECK-NEXT:    SHR
@@ -649,7 +643,7 @@ define i256 @ctlztest(i256 %v) {
 ; CHECK-NEXT:    SWAP2
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    ADD
-; CHECK-NEXT:    SWAP10
+; CHECK-NEXT:    SWAP8
 ; CHECK-NEXT:    DUP3
 ; CHECK-NEXT:    PUSH1 0x1
 ; CHECK-NEXT:    SHR
@@ -666,26 +660,24 @@ define i256 @ctlztest(i256 %v) {
 ; CHECK-NEXT:    SWAP2
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    ADD
-; CHECK-NEXT:    SWAP7
+; CHECK-NEXT:    SWAP5
 ; CHECK-NEXT:    DUP1
 ; CHECK-NEXT:    PUSH1 0x4
 ; CHECK-NEXT:    SHR
 ; CHECK-NEXT:    ADD
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    MUL
-; CHECK-NEXT:    PUSH1 0x78
-; CHECK-NEXT:    SHR
-; CHECK-NEXT:    AND
-; CHECK-NEXT:    SWAP4
+; CHECK-NEXT:    PUSH1 0x10
+; CHECK-NEXT:    BYTE
+; CHECK-NEXT:    SWAP3
 ; CHECK-NEXT:    DUP1
 ; CHECK-NEXT:    PUSH1 0x4
 ; CHECK-NEXT:    SHR
 ; CHECK-NEXT:    ADD
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    MUL
-; CHECK-NEXT:    PUSH1 0x78
-; CHECK-NEXT:    SHR
-; CHECK-NEXT:    AND
+; CHECK-NEXT:    PUSH1 0x10
+; CHECK-NEXT:    BYTE
 ; CHECK-NEXT:    ADD
 ; CHECK-NEXT:    SWAP1
 ; CHECK-NEXT:    JUMP
@@ -698,23 +690,21 @@ define i256 @cttztest(i256 %v) {
 ; CHECK-LABEL: cttztest:
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    JUMPDEST
-; CHECK-NEXT:    PUSH1 0xFF
 ; CHECK-NEXT:    PUSH32 0x101010101010101010101010101010101010101010101010101010101010101
 ; CHECK-NEXT:    PUSH16 0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F
-; CHECK-NEXT:    DUP3
-; CHECK-NEXT:    DUP3
-; CHECK-NEXT:    DUP3
+; CHECK-NEXT:    DUP2
+; CHECK-NEXT:    DUP2
 ; CHECK-NEXT:    PUSH32 0x3333333333333333333333333333333333333333333333333333333333333333
-; CHECK-NEXT:    DUP8
+; CHECK-NEXT:    DUP6
 ; CHECK-NEXT:    PUSH1 0x1
 ; CHECK-NEXT:    PUSH16 0x55555555555555555555555555555555
-; CHECK-NEXT:    SWAP10
+; CHECK-NEXT:    SWAP8
 ; CHECK-NEXT:    SUB
 ; CHECK-NEXT:    SWAP1
 ; CHECK-NEXT:    NOT
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    PUSH16 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
-; CHECK-NEXT:    DUP10
+; CHECK-NEXT:    DUP8
 ; CHECK-NEXT:    DUP3
 ; CHECK-NEXT:    PUSH1 0x81
 ; CHECK-NEXT:    SHR
@@ -732,7 +722,7 @@ define i256 @cttztest(i256 %v) {
 ; CHECK-NEXT:    SWAP2
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    ADD
-; CHECK-NEXT:    SWAP10
+; CHECK-NEXT:    SWAP8
 ; CHECK-NEXT:    DUP3
 ; CHECK-NEXT:    PUSH1 0x1
 ; CHECK-NEXT:    SHR
@@ -749,26 +739,24 @@ define i256 @cttztest(i256 %v) {
 ; CHECK-NEXT:    SWAP2
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    ADD
-; CHECK-NEXT:    SWAP7
+; CHECK-NEXT:    SWAP5
 ; CHECK-NEXT:    DUP1
 ; CHECK-NEXT:    PUSH1 0x4
 ; CHECK-NEXT:    SHR
 ; CHECK-NEXT:    ADD
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    MUL
-; CHECK-NEXT:    PUSH1 0x78
-; CHECK-NEXT:    SHR
-; CHECK-NEXT:    AND
-; CHECK-NEXT:    SWAP4
+; CHECK-NEXT:    PUSH1 0x10
+; CHECK-NEXT:    BYTE
+; CHECK-NEXT:    SWAP3
 ; CHECK-NEXT:    DUP1
 ; CHECK-NEXT:    PUSH1 0x4
 ; CHECK-NEXT:    SHR
 ; CHECK-NEXT:    ADD
 ; CHECK-NEXT:    AND
 ; CHECK-NEXT:    MUL
-; CHECK-NEXT:    PUSH1 0x78
-; CHECK-NEXT:    SHR
-; CHECK-NEXT:    AND
+; CHECK-NEXT:    PUSH1 0x10
+; CHECK-NEXT:    BYTE
 ; CHECK-NEXT:    ADD
 ; CHECK-NEXT:    SWAP1
 ; CHECK-NEXT:    JUMP
diff --git a/llvm/test/CodeGen/EVM/folding-lshr-with-and-to-byte.ll b/llvm/test/CodeGen/EVM/folding-lshr-with-and-to-byte.ll
@@ -0,0 +1,90 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s | FileCheck %s
+target datalayout = "E-p:256:256-i256:256:256-S256-a:256:256"
+target triple = "evm"
+
+; Check that we do the following transformation:
+; AND (SRL imm, v), 0xFF' -> 'BYTE (31 - imm / 8), v',
+; where imm % 8 == 0, and imm / 8 < 32.
+
+define i256 @byte_lshr_0(i256 %0) {
+; CHECK-LABEL: byte_lshr_0:
+; CHECK:       ; %bb.0:
+; CHECK-NEXT:    JUMPDEST
+; CHECK-NEXT:    PUSH1 0xFF
+; CHECK-NEXT:    AND
+; CHECK-NEXT:    SWAP1
+; CHECK-NEXT:    JUMP
+  %r = and i256 %0, 255
+  ret i256 %r
+}
+
+define i256 @byte_lshr_8(i256 %0) {
+; CHECK-LABEL: byte_lshr_8:
+; CHECK:       ; %bb.0:
+; CHECK-NEXT:    JUMPDEST
+; CHECK-NEXT:    PUSH1 0x1E
+; CHECK-NEXT:    BYTE
+; CHECK-NEXT:    SWAP1
+; CHECK-NEXT:    JUMP
+  %s = lshr i256 %0, 8
+  %r = and i256 %s, 255
+  ret i256 %r
+}
+
+define i256 @byte_lshr_16(i256 %0) {
+; CHECK-LABEL: byte_lshr_16:
+; CHECK:       ; %bb.0:
+; CHECK-NEXT:    JUMPDEST
+; CHECK-NEXT:    PUSH1 0x1D
+; CHECK-NEXT:    BYTE
+; CHECK-NEXT:    SWAP1
+; CHECK-NEXT:    JUMP
+  %s = lshr i256 %0, 16
+  %r = and i256 %s, 255
+  ret i256 %r
+}
+
+define i256 @byte_lshr_248(i256 %0) {
+; CHECK-LABEL: byte_lshr_248:
+; CHECK:       ; %bb.0:
+; CHECK-NEXT:    JUMPDEST
+; CHECK-NEXT:    PUSH0
+; CHECK-NEXT:    BYTE
+; CHECK-NEXT:    SWAP1
+; CHECK-NEXT:    JUMP
+  %s = lshr i256 %0, 248
+  %r = and i256 %s, 255
+  ret i256 %r
+}
+
+; Should not apply: imm = 9 (not divisible by 8)
+define i256 @shift_not_multiple_of_8(i256 %0) {
+; CHECK-LABEL: shift_not_multiple_of_8:
+; CHECK:       ; %bb.0:
+; CHECK-NEXT:    JUMPDEST
+; CHECK-NEXT:    PUSH1 0xFF
+; CHECK-NEXT:    SWAP1
+; CHECK-NEXT:    PUSH1 0x9
+; CHECK-NEXT:    SHR
+; CHECK-NEXT:    AND
+; CHECK-NEXT:    SWAP1
+; CHECK-NEXT:    JUMP
+  %s = lshr i256 %0, 9
+  %r = and i256 %s, 255
+  ret i256 %r
+}
+
+; Should not apply: imm = 256 (256 / 8 > 31)
+define i256 @shift_too_large(i256 %0) {
+; CHECK-LABEL: shift_too_large:
+; CHECK:       ; %bb.0:
+; CHECK-NEXT:    JUMPDEST
+; CHECK-NEXT:    POP
+; CHECK-NEXT:    PUSH0
+; CHECK-NEXT:    SWAP1
+; CHECK-NEXT:    JUMP
+  %s = lshr i256 %0, 256
+  %r = and i256 %s, 255
+  ret i256 %r
+}
diff --git a/llvm/test/CodeGen/EVM/zero_any_extload.ll b/llvm/test/CodeGen/EVM/zero_any_extload.ll
@@ -9,8 +9,8 @@ define i8 @load_anyext_i8(ptr addrspace(1) %ptr) nounwind {
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    JUMPDEST
 ; CHECK-NEXT:    MLOAD
-; CHECK-NEXT:    PUSH1 0xF8
-; CHECK-NEXT:    SHR
+; CHECK-NEXT:    PUSH0
+; CHECK-NEXT:    BYTE
 ; CHECK-NEXT:    SWAP1
 ; CHECK-NEXT:    JUMP
 
@@ -79,8 +79,8 @@ define i256 @load_zeroext_i8(ptr addrspace(1) %ptr) nounwind {
 ; CHECK:       ; %bb.0:
 ; CHECK-NEXT:    JUMPDEST
 ; CHECK-NEXT:    MLOAD
-; CHECK-NEXT:    PUSH1 0xF8
-; CHECK-NEXT:    SHR
+; CHECK-NEXT:    PUSH0
+; CHECK-NEXT:    BYTE
 ; CHECK-NEXT:    SWAP1
 ; CHECK-NEXT:    JUMP
 
