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[EraVM][AsmPrinter] Reuse EraVM::analyzeMCOperandsCode/Stack functions.
Reuse the same `parseMCOperandsCode` and `parseMCOperandsStack` functions that are used by code emitter to analyze operands of MCInst. While it makes easier to improve formatting of printed assembly code, this commit strives to keep the existing formatting as much as possible, to not combine refactoring with massive changes of tests.
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11 files changed

+150
-137
lines changed

11 files changed

+150
-137
lines changed

‎llvm/lib/Target/EraVM/MCTargetDesc/EraVMAsmBackend.cpp‎

Lines changed: 15 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -168,7 +168,7 @@ static void analyzeMCOperands(const MCInst &MI, unsigned Idx, unsigned &Reg,
168168
Addend = 0;
169169

170170
if (AddendOp.isImm())
171-
Addend = AddendOp.getImm() & 0xFFFF;
171+
Addend = AddendOp.getImm();
172172
else if (const auto *E = dyn_cast<MCSymbolRefExpr>(AddendOp.getExpr()))
173173
Symbol = &E->getSymbol();
174174
else if (const auto *E = dyn_cast<MCBinaryExpr>(AddendOp.getExpr())) {
@@ -177,7 +177,7 @@ static void analyzeMCOperands(const MCInst &MI, unsigned Idx, unsigned &Reg,
177177
const auto *Imm = dyn_cast<MCConstantExpr>(E->getRHS());
178178
assert(Sym && Imm && "Expected symbol+imm expression");
179179
Symbol = &Sym->getSymbol();
180-
Addend = Imm->getValue() & 0xFFFF;
180+
Addend = Imm->getValue();
181181
} else {
182182
llvm_unreachable("Unexpected Addend operand");
183183
}
@@ -192,6 +192,19 @@ void EraVM::analyzeMCOperandsStack(const MCInst &MI, unsigned Idx, bool IsSrc,
192192
unsigned &Reg, MemOperandKind &Kind,
193193
const MCSymbol *&Symbol, int &Addend) {
194194
const MCOperand &MarkerOp = MI.getOperand(Idx);
195+
196+
if (MarkerOp.isExpr()) {
197+
// Handle (@SYM, i256 0, 0)
198+
assert(MI.getOperand(Idx + 1).getImm() == 0);
199+
assert(MI.getOperand(Idx + 2).getImm() == 0);
200+
const MCExpr *Expr = MarkerOp.getExpr();
201+
Reg = EraVM::R0;
202+
Kind = OperandStackAbsolute;
203+
Symbol = &cast<MCSymbolRefExpr>(Expr)->getSymbol();
204+
Addend = 0;
205+
return;
206+
}
207+
195208
assert(MarkerOp.isImm() || MarkerOp.isReg());
196209

197210
if (MarkerOp.isImm()) {

‎llvm/lib/Target/EraVM/MCTargetDesc/EraVMInstPrinter.cpp‎

Lines changed: 81 additions & 99 deletions
Original file line numberDiff line numberDiff line change
@@ -111,116 +111,98 @@ void EraVMInstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo,
111111

112112
void EraVMInstPrinter::printMemOperand(const MCInst *MI, unsigned OpNo,
113113
raw_ostream &O) {
114-
const MCOperand &Base = MI->getOperand(OpNo);
115-
const MCOperand &Disp = MI->getOperand(OpNo + 1);
114+
unsigned BaseReg = 0;
115+
const MCSymbol *Symbol = nullptr;
116+
int Addend = 0;
117+
118+
EraVM::analyzeMCOperandsCode(*MI, OpNo, BaseReg, Symbol, Addend);
119+
if (BaseReg == EraVM::R0)
120+
BaseReg = 0;
121+
122+
if (Symbol)
123+
O << "@" << Symbol->getName() << "[";
124+
else
125+
O << "code[";
126+
127+
if (!BaseReg && !Addend)
128+
O << "0";
129+
130+
if (BaseReg)
131+
O << getRegisterName(BaseReg);
132+
133+
if (Addend) {
134+
if (Addend < 0)
135+
O << "-";
136+
else if (BaseReg)
137+
O << "+";
138+
O << std::abs(Addend);
139+
}
116140

117-
// print constant pool memory
118-
if (Base.isExpr()) {
119-
Base.getExpr()->print(O, &MAI);
120-
O << "[0]";
121-
return;
141+
O << "]";
142+
}
143+
144+
template <bool IsInput>
145+
void EraVMInstPrinter::printStackOperand(const MCInst *MI, unsigned OpNo,
146+
raw_ostream &O) {
147+
using namespace EraVM;
148+
149+
unsigned BaseReg = 0;
150+
MemOperandKind Kind = MemOperandKind::OperandCode;
151+
const MCSymbol *Symbol = nullptr;
152+
int Addend = 0;
153+
analyzeMCOperandsStack(*MI, OpNo, IsInput, BaseReg, Kind, Symbol, Addend);
154+
155+
switch (Kind) {
156+
default:
157+
llvm_unreachable("Unexpected kind");
158+
case MemOperandKind::OperandStackAbsolute:
159+
O << "stack[";
160+
break;
161+
case MemOperandKind::OperandStackSPRelative:
162+
O << "stack-[";
163+
break;
164+
case MemOperandKind::OperandStackSPDecrement:
165+
O << "stack-=[";
166+
break;
167+
case MemOperandKind::OperandStackSPIncrement:
168+
O << "stack+=[";
169+
break;
122170
}
123171

124-
if (Base.isReg() && Disp.isImm()) {
125-
if (Disp.getImm() == 0)
126-
O << "code[" << getRegisterName(Base.getReg()) << "]";
127-
else
128-
O << "code[" << getRegisterName(Base.getReg()) << "+" << Disp.getImm()
129-
<< "]";
172+
if (!Symbol && !Addend && !BaseReg) {
173+
O << "0]";
130174
return;
131175
}
132176

133-
// Print displacement first
134-
if (Disp.isExpr()) {
135-
const auto *expr = Disp.getExpr();
136-
// handle the case where symbol has an offset
137-
if (const auto *binExpr = dyn_cast<MCBinaryExpr>(expr)) {
138-
assert(binExpr->getOpcode() == MCBinaryExpr::Add &&
139-
"Unexpected binary expression type, check EraVMMCInstLower "
140-
"for reference.");
141-
const auto *sym = cast<MCSymbolRefExpr>(binExpr->getLHS());
142-
const auto *offset = cast<MCConstantExpr>(binExpr->getRHS());
143-
// print symbol
144-
O << '@' << sym->getSymbol().getName() << "[";
145-
// if there is a reg, print it before offset
146-
if (Base.isReg())
147-
O << getRegisterName(Base.getReg()) << "+";
148-
// finally, print offset
149-
O << offset->getValue() << "]";
150-
} else if (const auto *symExpr = dyn_cast<MCSymbolRefExpr>(expr)) {
151-
// handle the case where symbol has no imm offset but could have a reg
152-
// index
153-
if (Base.isReg())
154-
O << '@' << symExpr->getSymbol().getName() << "["
155-
<< getRegisterName(Base.getReg()) << "]";
156-
else
157-
O << '@' << symExpr->getSymbol().getName() << "[0]";
158-
}
159-
return;
177+
bool PrintedSomething = false;
178+
179+
if (Symbol) {
180+
O << "@" << Symbol->getName();
181+
PrintedSomething = true;
160182
}
161183

162-
assert(Disp.isImm() && "Expected immediate in displacement field");
163-
O << Disp.getImm();
164-
}
184+
if (Addend == 0 && Kind != MemOperandKind::OperandStackAbsolute) {
185+
// Always print immediate addend in stack-[...], stack-=[...], stack+=[...].
186+
// TODO Remove this special case and update the tests.
187+
O << "0";
188+
PrintedSomething = true;
189+
}
165190

166-
template <bool IsInput>
167-
void EraVMInstPrinter::printStackOperand(const MCInst *MI, unsigned OpNo,
168-
raw_ostream &O) {
169-
const MCOperand &Base1 = MI->getOperand(OpNo);
170-
const MCOperand &Base2 = MI->getOperand(OpNo + 1);
171-
const MCOperand &Disp = MI->getOperand(OpNo + 2);
172-
173-
// FIXME
174-
bool ExprPermitted = !Base1.isReg();
175-
if (Base1.isReg()) {
176-
switch (Base1.getReg()) {
177-
case EraVM::SP:
178-
O << "stack-[";
179-
break;
180-
case EraVM::R0:
181-
O << (IsInput ? "stack-=[" : "stack+=[");
182-
break;
183-
default:
184-
llvm_unreachable("unexpected register operand");
185-
}
186-
} else {
187-
O << "stack[";
191+
if (Addend) {
192+
if (Addend < 0)
193+
O << " - ";
194+
else if (PrintedSomething)
195+
O << " + ";
196+
O << std::abs(Addend);
197+
PrintedSomething = true;
188198
}
189199

190-
if (Base2.isReg()) {
191-
if (!ExprPermitted) {
192-
// stack-[disp + reg];
193-
// FIXME Check if any machine pass actually emits Disp < 0,
194-
// as it was asserted before.
195-
assert(Disp.isImm() && Disp.getImm() >= 0); // don't support expr yet
196-
O << Disp.getImm() << " + " << getRegisterName(Base2.getReg());
197-
} else {
198-
// print absolute address in format stack[disp + reg]:
199-
if (Disp.isImm()) {
200-
// skip the sign if disp is 0
201-
if (Disp.getImm() > 0)
202-
O << Disp.getImm();
203-
else if (Disp.getImm() < 0)
204-
O << " - " << std::abs(Disp.getImm());
205-
206-
// if disp is 0, don't print the + sign
207-
if (Disp.getImm() != 0)
208-
O << " + ";
209-
} else {
210-
assert(Disp.isExpr());
211-
Disp.getExpr()->print(O, &MAI);
212-
O << " + ";
213-
}
214-
O << getRegisterName(Base2.getReg());
215-
}
216-
} else {
217-
// Print displacement first
218-
if (Disp.isExpr())
219-
Disp.getExpr()->print(O, &MAI);
220-
else {
221-
assert(Disp.isImm() && "Expected immediate in displacement field");
222-
O << std::abs(Disp.getImm());
223-
}
200+
if (BaseReg) {
201+
if (PrintedSomething)
202+
O << " + ";
203+
O << getRegisterName(BaseReg);
204+
PrintedSomething = true;
224205
}
206+
225207
O << "]";
226208
}

‎llvm/test/CodeGen/EraVM/array.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,15 +19,15 @@ define i256 @consti_loadconst_neg_offset(i256 %idx) nounwind {
1919

2020
; CHECK-LABEL: consti_loadconst_storeglobal
2121
define void @consti_loadconst_storeglobal() nounwind {
22-
; CHECK: add @const[1], r0, stack[@val+1]
22+
; CHECK: add @const[1], r0, stack[@val + 1]
2323
%1 = load i256, ptr addrspace(4) getelementptr inbounds ([10 x i256], ptr addrspace(4) @const, i256 0, i256 1), align 32
2424
store i256 %1, ptr getelementptr inbounds ([10 x i256], ptr @val, i256 0, i256 1), align 32
2525
ret void
2626
}
2727

2828
; CHECK-LABEL: consti_loadglobal_storeglobal
2929
define void @consti_loadglobal_storeglobal() nounwind {
30-
; CHECK: add stack[@val+7], r0, stack[@val+1]
30+
; CHECK: add stack[@val + 7], r0, stack[@val + 1]
3131
%1 = load i256, ptr getelementptr inbounds ([10 x i256], ptr @val, i256 0, i256 7), align 32
3232
store i256 %1, ptr getelementptr inbounds ([10 x i256], ptr @val, i256 0, i256 1), align 32
3333
ret void

‎llvm/test/CodeGen/EraVM/globals.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ define i256 @load.fromarray2(i256 %i) nounwind {
3838
%elem = getelementptr [4 x i256], [4 x i256]* @val2.arr, i256 0, i256 1
3939
%elem2 = getelementptr i256, i256* %elem, i256 %i
4040
; TODO: CPR-1280: assembler to support this stack access pattern
41-
; CHECK: add stack[@val2.arr+1 + r1], r0, r1
41+
; CHECK: add stack[@val2.arr + 1 + r1], r0, r1
4242
%res = load i256, i256* %elem2
4343
ret i256 %res
4444
}
@@ -47,7 +47,7 @@ define i256 @load.fromarray2(i256 %i) nounwind {
4747
define void @store.toarray2(i256 %i) nounwind {
4848
%elem = getelementptr [4 x i256], [4 x i256]* @val2.arr, i256 0, i256 1
4949
%elem2 = getelementptr i256, i256* %elem, i256 %i
50-
; CHECK: add 1024, r0, stack[@val2.arr+1 + r1]
50+
; CHECK: add 1024, r0, stack[@val2.arr + 1 + r1]
5151
store i256 1024, i256* %elem2
5252
ret void
5353
}

‎llvm/test/MC/EraVM/asm-parser/arith-operands.s‎

Lines changed: 19 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,22 +10,27 @@ foo:
1010
add 65535, r2, r3
1111
add 0x4321, r2, r3
1212
; src: code
13+
add code[r0 + 0], r2, r3
1314
add code[r1], r2, r3
1415
add code[42], r2, r3
1516
add code[r1 + 42], r2, r3
1617
; src: stack, absolute
18+
add stack[r0 + 0], r2, r3
1719
add stack[r1], r2, r3
1820
add stack[42], r2, r3
1921
add stack[r1 + 42], r2, r3
2022
; src: stack, absolute (alternative syntax)
23+
add stack=[r0 + 0], r2, r3
2124
add stack=[r1], r2, r3
2225
add stack=[42], r2, r3
2326
add stack=[r1 + 42], r2, r3
2427
; src: stack, SP-relative
28+
add stack-[r0 + 0], r2, r3
2529
add stack-[r1], r2, r3
2630
add stack-[42], r2, r3
2731
add stack-[r1 + 42], r2, r3
2832
; src: stack, SP-relative, SP-decrementing
33+
add stack-=[r0 + 0], r2, r3
2934
add stack-=[r1], r2, r3
3035
add stack-=[42], r2, r3
3136
add stack-=[r1 + 42], r2, r3
@@ -42,18 +47,22 @@ foo:
4247
; dst: register
4348
add r1, r2, r3
4449
; dst: stack, absolute
50+
add r1, r2, stack[r0 + 0]
4551
add r1, r2, stack[r1]
4652
add r1, r2, stack[42]
4753
add r1, r2, stack[r1 + 42]
4854
; dst: stack, absolute (alternative syntax)
55+
add r1, r2, stack=[r0 + 0]
4956
add r1, r2, stack=[r1]
5057
add r1, r2, stack=[42]
5158
add r1, r2, stack=[r1 + 42]
5259
; dst: stack, SP-relative
60+
add r1, r2, stack-[r0 + 0]
5361
add r1, r2, stack-[r1]
5462
add r1, r2, stack-[42]
5563
add r1, r2, stack-[r1 + 42]
5664
; dst: stack, SP-relative, SP-incrementing
65+
add r1, r2, stack+=[r0 + 0]
5766
add r1, r2, stack+=[r1]
5867
add r1, r2, stack+=[42]
5968
add r1, r2, stack+=[r1 + 42]
@@ -67,18 +76,23 @@ foo:
6776
; CHECK: add 42, r2, r3
6877
; CHECK: add 65535, r2, r3
6978
; CHECK: add 17185, r2, r3
79+
; CHECK: add code[0], r2, r3
7080
; CHECK: add code[r1], r2, r3
71-
; CHECK: add code[r0+42], r2, r3
81+
; CHECK: add code[42], r2, r3
7282
; CHECK: add code[r1+42], r2, r3
83+
; CHECK: add stack[r0], r2, r3
7384
; CHECK: add stack[r1], r2, r3
7485
; CHECK: add stack[42], r2, r3
7586
; CHECK: add stack[42 + r1], r2, r3
87+
; CHECK: add stack[r0], r2, r3
7688
; CHECK: add stack[r1], r2, r3
7789
; CHECK: add stack[42], r2, r3
7890
; CHECK: add stack[42 + r1], r2, r3
91+
; CHECK: add stack-[0 + r0], r2, r3
7992
; CHECK: add stack-[0 + r1], r2, r3
8093
; CHECK: add stack-[42], r2, r3
8194
; CHECK: add stack-[42 + r1], r2, r3
95+
; CHECK: add stack-=[0 + r0], r2, r3
8296
; CHECK: add stack-=[0 + r1], r2, r3
8397
; CHECK: add stack-=[42], r2, r3
8498
; CHECK: add stack-=[42 + r1], r2, r3
@@ -92,15 +106,19 @@ foo:
92106
; CHECK: add stack[65494 + r1], r2, r3
93107

94108
; CHECK: add r1, r2, r3
109+
; CHECK: add r1, r2, stack[r0]
95110
; CHECK: add r1, r2, stack[r1]
96111
; CHECK: add r1, r2, stack[42]
97112
; CHECK: add r1, r2, stack[42 + r1]
113+
; CHECK: add r1, r2, stack[r0]
98114
; CHECK: add r1, r2, stack[r1]
99115
; CHECK: add r1, r2, stack[42]
100116
; CHECK: add r1, r2, stack[42 + r1]
117+
; CHECK: add r1, r2, stack-[0 + r0]
101118
; CHECK: add r1, r2, stack-[0 + r1]
102119
; CHECK: add r1, r2, stack-[42]
103120
; CHECK: add r1, r2, stack-[42 + r1]
121+
; CHECK: add r1, r2, stack+=[0 + r0]
104122
; CHECK: add r1, r2, stack+=[0 + r1]
105123
; CHECK: add r1, r2, stack+=[42]
106124
; CHECK: add r1, r2, stack+=[42 + r1]

‎llvm/test/MC/EraVM/asm-parser/near-jump.s‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,6 @@ foo:
5353
; CHECK: jump code[r1+1], r2
5454

5555
; CHECK: jump @label
56-
; CHECK: jump @jump_table[r0+1]
56+
; CHECK: jump @jump_table[1]
5757
; CHECK: jump @label, r2
58-
; CHECK: jump @jump_table[r0+1], r2
58+
; CHECK: jump @jump_table[1], r2

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