@@ -7,8 +7,6 @@ target triple = "evm"
77declare i256 @llvm.bitreverse.i256 (i256 )
88declare i256 @llvm.bswap.i256 (i256 )
99declare i256 @llvm.ctpop.i256 (i256 )
10- declare i256 @llvm.ctlz.i256 (i256 , i1 )
11- declare i256 @llvm.cttz.i256 (i256 , i1 )
1210
1311define i256 @bitreversetest (i256 %v ) {
1412; CHECK-LABEL: bitreversetest:
@@ -583,188 +581,3 @@ define i256 @ctpoptest(i256 %v) {
583581 %res = call i256 @llvm.ctpop.i256 (i256 %v )
584582 ret i256 %res
585583}
586-
587- define i256 @ctlztest (i256 %v ) {
588- ; CHECK-LABEL: ctlztest:
589- ; CHECK: ; %bb.0:
590- ; CHECK-NEXT: JUMPDEST
591- ; CHECK-NEXT: PUSH32 0x101010101010101010101010101010101010101010101010101010101010101
592- ; CHECK-NEXT: PUSH16 0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F
593- ; CHECK-NEXT: DUP2
594- ; CHECK-NEXT: DUP2
595- ; CHECK-NEXT: PUSH32 0x3333333333333333333333333333333333333333333333333333333333333333
596- ; CHECK-NEXT: DUP6
597- ; CHECK-NEXT: PUSH16 0x55555555555555555555555555555555
598- ; CHECK-NEXT: SWAP7
599- ; CHECK-NEXT: PUSH1 0x1
600- ; CHECK-NEXT: SHR
601- ; CHECK-NEXT: OR
602- ; CHECK-NEXT: DUP1
603- ; CHECK-NEXT: PUSH1 0x2
604- ; CHECK-NEXT: SHR
605- ; CHECK-NEXT: OR
606- ; CHECK-NEXT: DUP1
607- ; CHECK-NEXT: PUSH1 0x4
608- ; CHECK-NEXT: SHR
609- ; CHECK-NEXT: OR
610- ; CHECK-NEXT: DUP1
611- ; CHECK-NEXT: PUSH1 0x8
612- ; CHECK-NEXT: SHR
613- ; CHECK-NEXT: OR
614- ; CHECK-NEXT: DUP1
615- ; CHECK-NEXT: PUSH1 0x10
616- ; CHECK-NEXT: SHR
617- ; CHECK-NEXT: OR
618- ; CHECK-NEXT: DUP1
619- ; CHECK-NEXT: PUSH1 0x20
620- ; CHECK-NEXT: SHR
621- ; CHECK-NEXT: OR
622- ; CHECK-NEXT: DUP1
623- ; CHECK-NEXT: PUSH1 0x40
624- ; CHECK-NEXT: SHR
625- ; CHECK-NEXT: OR
626- ; CHECK-NEXT: DUP1
627- ; CHECK-NEXT: PUSH1 0x80
628- ; CHECK-NEXT: SHR
629- ; CHECK-NEXT: OR
630- ; CHECK-NEXT: NOT
631- ; CHECK-NEXT: PUSH16 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
632- ; CHECK-NEXT: DUP8
633- ; CHECK-NEXT: DUP3
634- ; CHECK-NEXT: PUSH1 0x81
635- ; CHECK-NEXT: SHR
636- ; CHECK-NEXT: AND
637- ; CHECK-NEXT: DUP3
638- ; CHECK-NEXT: PUSH1 0x80
639- ; CHECK-NEXT: SHR
640- ; CHECK-NEXT: SUB
641- ; CHECK-NEXT: DUP4
642- ; CHECK-NEXT: DUP1
643- ; CHECK-NEXT: DUP3
644- ; CHECK-NEXT: PUSH1 0x2
645- ; CHECK-NEXT: SHR
646- ; CHECK-NEXT: AND
647- ; CHECK-NEXT: SWAP2
648- ; CHECK-NEXT: AND
649- ; CHECK-NEXT: ADD
650- ; CHECK-NEXT: SWAP8
651- ; CHECK-NEXT: DUP3
652- ; CHECK-NEXT: PUSH1 0x1
653- ; CHECK-NEXT: SHR
654- ; CHECK-NEXT: AND
655- ; CHECK-NEXT: SWAP2
656- ; CHECK-NEXT: AND
657- ; CHECK-NEXT: SUB
658- ; CHECK-NEXT: SWAP1
659- ; CHECK-NEXT: DUP1
660- ; CHECK-NEXT: DUP3
661- ; CHECK-NEXT: PUSH1 0x2
662- ; CHECK-NEXT: SHR
663- ; CHECK-NEXT: AND
664- ; CHECK-NEXT: SWAP2
665- ; CHECK-NEXT: AND
666- ; CHECK-NEXT: ADD
667- ; CHECK-NEXT: SWAP5
668- ; CHECK-NEXT: DUP1
669- ; CHECK-NEXT: PUSH1 0x4
670- ; CHECK-NEXT: SHR
671- ; CHECK-NEXT: ADD
672- ; CHECK-NEXT: AND
673- ; CHECK-NEXT: MUL
674- ; CHECK-NEXT: PUSH1 0x10
675- ; CHECK-NEXT: BYTE
676- ; CHECK-NEXT: SWAP3
677- ; CHECK-NEXT: DUP1
678- ; CHECK-NEXT: PUSH1 0x4
679- ; CHECK-NEXT: SHR
680- ; CHECK-NEXT: ADD
681- ; CHECK-NEXT: AND
682- ; CHECK-NEXT: MUL
683- ; CHECK-NEXT: PUSH1 0x10
684- ; CHECK-NEXT: BYTE
685- ; CHECK-NEXT: ADD
686- ; CHECK-NEXT: SWAP1
687- ; CHECK-NEXT: JUMP
688-
689- %res = call i256 @llvm.ctlz.i256 (i256 %v , i1 false )
690- ret i256 %res
691- }
692-
693- define i256 @cttztest (i256 %v ) {
694- ; CHECK-LABEL: cttztest:
695- ; CHECK: ; %bb.0:
696- ; CHECK-NEXT: JUMPDEST
697- ; CHECK-NEXT: PUSH32 0x101010101010101010101010101010101010101010101010101010101010101
698- ; CHECK-NEXT: PUSH16 0xF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F
699- ; CHECK-NEXT: DUP2
700- ; CHECK-NEXT: DUP2
701- ; CHECK-NEXT: PUSH32 0x3333333333333333333333333333333333333333333333333333333333333333
702- ; CHECK-NEXT: DUP6
703- ; CHECK-NEXT: PUSH1 0x1
704- ; CHECK-NEXT: PUSH16 0x55555555555555555555555555555555
705- ; CHECK-NEXT: SWAP8
706- ; CHECK-NEXT: SUB
707- ; CHECK-NEXT: SWAP1
708- ; CHECK-NEXT: NOT
709- ; CHECK-NEXT: AND
710- ; CHECK-NEXT: PUSH16 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
711- ; CHECK-NEXT: DUP8
712- ; CHECK-NEXT: DUP3
713- ; CHECK-NEXT: PUSH1 0x81
714- ; CHECK-NEXT: SHR
715- ; CHECK-NEXT: AND
716- ; CHECK-NEXT: DUP3
717- ; CHECK-NEXT: PUSH1 0x80
718- ; CHECK-NEXT: SHR
719- ; CHECK-NEXT: SUB
720- ; CHECK-NEXT: DUP4
721- ; CHECK-NEXT: DUP1
722- ; CHECK-NEXT: DUP3
723- ; CHECK-NEXT: PUSH1 0x2
724- ; CHECK-NEXT: SHR
725- ; CHECK-NEXT: AND
726- ; CHECK-NEXT: SWAP2
727- ; CHECK-NEXT: AND
728- ; CHECK-NEXT: ADD
729- ; CHECK-NEXT: SWAP8
730- ; CHECK-NEXT: DUP3
731- ; CHECK-NEXT: PUSH1 0x1
732- ; CHECK-NEXT: SHR
733- ; CHECK-NEXT: AND
734- ; CHECK-NEXT: SWAP2
735- ; CHECK-NEXT: AND
736- ; CHECK-NEXT: SUB
737- ; CHECK-NEXT: SWAP1
738- ; CHECK-NEXT: DUP1
739- ; CHECK-NEXT: DUP3
740- ; CHECK-NEXT: PUSH1 0x2
741- ; CHECK-NEXT: SHR
742- ; CHECK-NEXT: AND
743- ; CHECK-NEXT: SWAP2
744- ; CHECK-NEXT: AND
745- ; CHECK-NEXT: ADD
746- ; CHECK-NEXT: SWAP5
747- ; CHECK-NEXT: DUP1
748- ; CHECK-NEXT: PUSH1 0x4
749- ; CHECK-NEXT: SHR
750- ; CHECK-NEXT: ADD
751- ; CHECK-NEXT: AND
752- ; CHECK-NEXT: MUL
753- ; CHECK-NEXT: PUSH1 0x10
754- ; CHECK-NEXT: BYTE
755- ; CHECK-NEXT: SWAP3
756- ; CHECK-NEXT: DUP1
757- ; CHECK-NEXT: PUSH1 0x4
758- ; CHECK-NEXT: SHR
759- ; CHECK-NEXT: ADD
760- ; CHECK-NEXT: AND
761- ; CHECK-NEXT: MUL
762- ; CHECK-NEXT: PUSH1 0x10
763- ; CHECK-NEXT: BYTE
764- ; CHECK-NEXT: ADD
765- ; CHECK-NEXT: SWAP1
766- ; CHECK-NEXT: JUMP
767-
768- %res = call i256 @llvm.cttz.i256 (i256 %v , i1 false )
769- ret i256 %res
770- }
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