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[EraVM] Add pre-commit tests for Fold arithmetic and bitwise instructions to select
Signed-off-by: Vladimir Radosavljevic <[email protected]>
1 parent f774aaf commit 9877225

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‎llvm/test/CodeGen/EraVM/fold-and-to-select.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -O3 --disable-eravm-scalar-opt-passes < %s | FileCheck %s
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target datalayout = "E-p:256:256-i256:256:256-S32-a:256:256"
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target triple = "eravm"
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define i256 @test_large_imm1(i256 %a) {
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; CHECK-LABEL: test_large_imm1:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: and @CPI0_0[0], r1, r2
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; CHECK-NEXT: sub.s! @CPI0_1[0], r1, r3
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; CHECK-NEXT: add.ge r1, r0, r2
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; CHECK-NEXT: add r2, r0, r1
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; CHECK-NEXT: ret
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%and = and i256 26959946660873538059280334323183841250350249843923952699046031785980, %a
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%cmp = icmp ult i256 %a, -26959946660873538059280334323183841250350249843923952699046031785985
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%select = select i1 %cmp, i256 %and, i256 %a
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ret i256 %select
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}
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define i256 @test_large_imm2(i256 %a) {
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; CHECK-LABEL: test_large_imm2:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: and @CPI1_0[0], r1, r2
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; CHECK-NEXT: sub.s! @CPI1_1[0], r1, r3
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; CHECK-NEXT: add.ge r2, r0, r1
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; CHECK-NEXT: ret
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%and = and i256 26959946660873538059280334323183841250350249843923952699046031785980, %a
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%cmp = icmp ult i256 %a, -26959946660873538059280334323183841250350249843923952699046031785985
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%select = select i1 %cmp, i256 %a, i256 %and
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ret i256 %select
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}
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define i256 @test_small_imm1(i256 %a) {
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; CHECK-LABEL: test_small_imm1:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: and 10, r1, r2
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; CHECK-NEXT: sub.s! @CPI2_0[0], r1, r3
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; CHECK-NEXT: add.ge r1, r0, r2
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; CHECK-NEXT: add r2, r0, r1
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; CHECK-NEXT: ret
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%and = and i256 10, %a
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%cmp = icmp ult i256 %a, -5
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%select = select i1 %cmp, i256 %and, i256 %a
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ret i256 %select
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}
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define i256 @test_small_imm2(i256 %a) {
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; CHECK-LABEL: test_small_imm2:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: and 10, r1, r2
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; CHECK-NEXT: sub.s! @CPI3_0[0], r1, r3
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; CHECK-NEXT: add.ge r2, r0, r1
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; CHECK-NEXT: ret
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%and = and i256 10, %a
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%cmp = icmp ult i256 %a, -5
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%select = select i1 %cmp, i256 %a, i256 %and
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ret i256 %select
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}
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define i256 @test_reg1(i256 %a, i256 %b) {
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; CHECK-LABEL: test_reg1:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: and r1, r2, r3
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; CHECK-NEXT: sub! r1, r2, r2
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; CHECK-NEXT: add.ge r1, r0, r3
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; CHECK-NEXT: add r3, r0, r1
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; CHECK-NEXT: ret
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%and = and i256 %a, %b
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%cmp = icmp ult i256 %a, %b
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%select = select i1 %cmp, i256 %and, i256 %a
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ret i256 %select
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}
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define i256 @test_reg2(i256 %a, i256 %b) {
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; CHECK-LABEL: test_reg2:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: and r1, r2, r3
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; CHECK-NEXT: sub! r1, r2, r2
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; CHECK-NEXT: add.ge r3, r0, r1
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; CHECK-NEXT: ret
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%and = and i256 %a, %b
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%cmp = icmp ult i256 %a, %b
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%select = select i1 %cmp, i256 %a, i256 %and
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ret i256 %select
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}

‎llvm/test/CodeGen/EraVM/fold-div-to-select.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -O3 --disable-eravm-scalar-opt-passes < %s | FileCheck %s
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target datalayout = "E-p:256:256-i256:256:256-S32-a:256:256"
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target triple = "eravm"
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define i256 @test_large_imm1(i256 %a) {
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; CHECK-LABEL: test_large_imm1:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: div.s @CPI0_0[0], r1, r2, r3
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; CHECK-NEXT: sub.s! @CPI0_1[0], r1, r3
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; CHECK-NEXT: add.ge r1, r0, r2
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; CHECK-NEXT: add r2, r0, r1
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; CHECK-NEXT: ret
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%div = udiv i256 %a, 26959946660873538059280334323183841250350249843923952699046031785980
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%cmp = icmp ult i256 %a, -26959946660873538059280334323183841250350249843923952699046031785985
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%select = select i1 %cmp, i256 %div, i256 %a
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ret i256 %select
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}
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define i256 @test_large_imm2(i256 %a) {
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; CHECK-LABEL: test_large_imm2:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: div.s @CPI1_0[0], r1, r2, r3
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; CHECK-NEXT: sub.s! @CPI1_1[0], r1, r3
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; CHECK-NEXT: add.ge r2, r0, r1
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; CHECK-NEXT: ret
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%div = udiv i256 %a, 26959946660873538059280334323183841250350249843923952699046031785980
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%cmp = icmp ult i256 %a, -26959946660873538059280334323183841250350249843923952699046031785985
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%select = select i1 %cmp, i256 %a, i256 %div
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ret i256 %select
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}
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define i256 @test_small_imm1(i256 %a) {
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; CHECK-LABEL: test_small_imm1:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: div.s 10, r1, r2, r3
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; CHECK-NEXT: sub.s! @CPI2_0[0], r1, r3
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; CHECK-NEXT: add.ge r1, r0, r2
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; CHECK-NEXT: add r2, r0, r1
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; CHECK-NEXT: ret
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%div = udiv i256 %a, 10
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%cmp = icmp ult i256 %a, -5
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%select = select i1 %cmp, i256 %div, i256 %a
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ret i256 %select
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}
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define i256 @test_small_imm2(i256 %a) {
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; CHECK-LABEL: test_small_imm2:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: div.s 10, r1, r2, r3
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; CHECK-NEXT: sub.s! @CPI3_0[0], r1, r3
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; CHECK-NEXT: add.ge r2, r0, r1
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; CHECK-NEXT: ret
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%div = udiv i256 %a, 10
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%cmp = icmp ult i256 %a, -5
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%select = select i1 %cmp, i256 %a, i256 %div
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ret i256 %select
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}
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define i256 @test_reg1(i256 %a, i256 %b) {
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; CHECK-LABEL: test_reg1:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: div r1, r2, r3, r4
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; CHECK-NEXT: sub! r1, r2, r2
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; CHECK-NEXT: add.ge r1, r0, r3
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; CHECK-NEXT: add r3, r0, r1
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; CHECK-NEXT: ret
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%div = udiv i256 %a, %b
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%cmp = icmp ult i256 %a, %b
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%select = select i1 %cmp, i256 %div, i256 %a
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ret i256 %select
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}
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define i256 @test_reg2(i256 %a, i256 %b) {
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; CHECK-LABEL: test_reg2:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: div r1, r2, r3, r4
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; CHECK-NEXT: sub! r1, r2, r2
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; CHECK-NEXT: add.ge r3, r0, r1
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; CHECK-NEXT: ret
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%div = udiv i256 %a, %b
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%cmp = icmp ult i256 %a, %b
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%select = select i1 %cmp, i256 %a, i256 %div
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ret i256 %select
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}

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