[MCP] Skip invalidating constant regs during forward propagation

Before this patch, redundant COPY couldn't be removed
for the following case:
  %reg1 = COPY %const-reg
  ... // No use of %reg1 but there is a def/use of %const-reg
  %reg2 = COPY killed %reg1

where this can be optimized to:
  ... // No use of %reg1 but there is a def/use of %const-reg
  %reg2 = COPY %const-reg

This patch allows for such optimization by not
invalidating constant registers. This is safe
even where constant registers are defined, as
architectures like AArch64 and RISCV replace a
dead definition of a GPR with a zero constant
register for certain instructions.

Upstream PR:
llvm/llvm-project#111129

Signed-off-by: Vladimir Radosavljevic <[email protected]>

Author: vladimirradosavljevic

llvm/lib/CodeGen/MachineCopyPropagation.cpp

@@ -843,6 +843,12 @@ void MachineCopyPropagation::ForwardCopyPropagateBlock(MachineBasicBlock &MBB) {
       assert(!Reg.isVirtual() &&
              "MachineCopyPropagation should be run after register allocation!");
 
+      // EraVM local begin
+      // Skip invalidating constant registers.
+      if (MRI->isReserved(Reg) && MRI->isConstantPhysReg(Reg))
+        continue;
+      // EraVM local end
+
       if (MO.isDef() && !MO.isEarlyClobber()) {
         Defs.push_back(Reg.asMCReg());
         continue;

llvm/test/CodeGen/EraVM/machine-cp-constant-reg.mir

@@ -18,9 +18,8 @@ body:             |
     ; CHECK-LABEL: name: test
     ; CHECK: liveins: $r2, $r3
     ; CHECK-NEXT: {{  $}}
-    ; CHECK-NEXT: renamable $r4 = COPY $r0
     ; CHECK-NEXT: dead $r0 = SUBrrr_v renamable $r2, renamable $r3, i256 0, implicit-def $flags
-    ; CHECK-NEXT: renamable $r1 = COPY killed renamable $r4
+    ; CHECK-NEXT: renamable $r1 = COPY $r0
     ; CHECK-NEXT: RET 0, implicit $r1
     renamable $r4 = COPY $r0
     dead $r0 = SUBrrr_v renamable $r2, renamable $r3, i256 0, implicit-def $flags