@@ -25,14 +25,10 @@ def OpndSR : SrcOperandMode;
2525def OpndCR : SrcOperandMode;
2626
2727// DestAddrMode:
28- class DestAddrModeValue<bits<3> val> {
29- bits<3> Value = val;
30- }
31- def DestAddrNotSet : DestAddrModeValue<0>;
32- def ToReg : DestAddrModeValue<1>;
33- def ToStack : DestAddrModeValue<2>;
34- def ToRegReg : DestAddrModeValue<3>;
35- def ToStackReg : DestAddrModeValue<4>;
28+ class DestOperandMode;
29+ def DestAddrNotSet : DestOperandMode;
30+ def ToReg : DestOperandMode;
31+ def ToStack : DestOperandMode;
3632
3733//===----------------------------------------------------------------------===//
3834// Instruction mapping tables
@@ -49,21 +45,16 @@ class mod_set_flags<bit silent> {
4945def PreserveFlags : mod_set_flags<0>;
5046def SetFlags : mod_set_flags<1>;
5147
52- def getFlagSettingOpcode : InstrMapping {
48+ class FlipFlagSetting<string from, string to> : InstrMapping {
5349 let FilterClass = "FlagSetting";
5450 let RowFields = ["BaseOpcode", "OperandAddrMode", "DestAddrMode", "ReverseOperands"];
5551 let ColFields = ["Silent"];
56- let KeyCol = ["1" ];
57- let ValueCols = [["0" ]];
52+ let KeyCol = [from ];
53+ let ValueCols = [[to ]];
5854}
5955
60- def getNonFlagSettingOpcode : InstrMapping {
61- let FilterClass = "FlagSetting";
62- let RowFields = ["BaseOpcode", "OperandAddrMode", "DestAddrMode", "ReverseOperands"];
63- let ColFields = ["Silent"];
64- let KeyCol = ["0"];
65- let ValueCols = [["1"]];
66- }
56+ def getFlagSettingOpcode : FlipFlagSetting<"PreserveFlags", "SetFlags">;
57+ def getNonFlagSettingOpcode : FlipFlagSetting<"SetFlags", "PreserveFlags">;
6758
6859// Instructions that support swapping arguments
6960// This included non-commutative arithmetic ones: sub, shl, shr, rol, ror, div and
@@ -77,21 +68,16 @@ class mod_swap<bit swap> {
7768def NoSwap : mod_swap<0>;
7869def Swap : mod_swap<1>;
7970
80- def withInsSwapped : InstrMapping {
71+ class FlipInsSwapped<string from, string to> : InstrMapping {
8172 let FilterClass = "Swappable";
8273 let RowFields = ["BaseOpcode", "OperandAddrMode", "DestAddrMode", "Silent"];
8374 let ColFields = ["ReverseOperands"];
84- let KeyCol = ["0" ];
85- let ValueCols = [["1" ]];
75+ let KeyCol = [from ];
76+ let ValueCols = [[to ]];
8677}
8778
88- def withInsNotSwapped : InstrMapping {
89- let FilterClass = "Swappable";
90- let RowFields = ["BaseOpcode", "OperandAddrMode", "DestAddrMode", "Silent"];
91- let ColFields = ["ReverseOperands"];
92- let KeyCol = ["1"];
93- let ValueCols = [["0"]];
94- }
79+ def withInsSwapped : FlipInsSwapped<"NoSwap", "Swap">;
80+ def withInsNotSwapped : FlipInsSwapped<"Swap", "NoSwap">;
9581
9682class AddrModeRel; // generic map of addressing mode of operands
9783class RetAddrModeRel; // generic map of addressing mode of results
@@ -109,21 +95,16 @@ def mapIRInputTo : MapInputFrom<"OpndIR">;
10995def mapCRInputTo : MapInputFrom<"OpndCR">;
11096def mapSRInputTo : MapInputFrom<"OpndSR">;
11197
112- def withStackResult : InstrMapping {
98+ class WithDifferentResult<string from, string to> : InstrMapping {
11399 let FilterClass = "RetAddrModeRel";
114100 let RowFields = ["BaseOpcode", "OperandAddrMode", "Silent", "ReverseOperands"];
115- let ColFields = ["ResultAM "];
116- let KeyCol = ["0" ];
117- let ValueCols = [["3" ]];
101+ let ColFields = ["DestAddrMode "];
102+ let KeyCol = [from ];
103+ let ValueCols = [[to ]];
118104}
119105
120- def withRegisterResult : InstrMapping {
121- let FilterClass = "RetAddrModeRel";
122- let RowFields = ["BaseOpcode", "OperandAddrMode", "Silent", "ReverseOperands"];
123- let ColFields = ["ResultAM"];
124- let KeyCol = ["3"];
125- let ValueCols = [["0"]];
126- }
106+ def withStackResult : WithDifferentResult<"ToReg", "ToStack">;
107+ def withRegisterResult : WithDifferentResult<"ToStack", "ToReg">;
127108
128109include "EraVMOpcodes.td"
129110
@@ -317,17 +298,16 @@ class IBinary<EraVMOpcode opcode,
317298 list<dag> pattern>
318299 : IForm <opcode, outs, ins, asmstr, pattern > {
319300 string BaseOpcode;
320- bit Silent = !eq( set_flags, PreserveFlags) ;
321- bit ReverseOperands = !eq( swap, Swap) ;
301+ mod_set_flags Silent = set_flags;
302+ mod_swap ReverseOperands = swap;
322303 SrcOperandMode OperandAddrMode = OpndAddrNotSet;
323- bits<3> DestAddrMode = DestAddrNotSet.Value;
324- int ResultAM = 0;
304+ DestOperandMode DestAddrMode = DestAddrNotSet;
325305
326306 let AsmString = !strconcat(opcode.Name,
327307 !if(!eq(swap, Swap), ".s", ""),
328308 !if(!eq(set_flags, SetFlags), "!", ""),
329309 "${cc}", "\t", asmstr);
330- let Defs = !if(Silent , [], [Flags]);
310+ let Defs = !if(!eq(set_flags, PreserveFlags) , [], [Flags]);
331311 let mayLoad = !or(isStackIn<src>.Value, !eq(src, SrcCodeAddr));
332312 let mayStore = isStackOut<dst>.Value;
333313
@@ -345,8 +325,7 @@ class IBinaryR<EraVMOpcode opcode,
345325 : IBinary <opcode, src, DstReg, swap_operands, silent, outs, ins, asmstr, pattern > {
346326 bits<4> rd0;
347327
348- let DestAddrMode = ToReg.Value;
349- let ResultAM = 0;
328+ let DestAddrMode = ToReg;
350329
351330 let Dst0 = rd0;
352331}
@@ -361,8 +340,7 @@ class IBinaryS<EraVMOpcode opcode,
361340 // Encode stack operand into 20 bits as reg + imm offset
362341 bits<20> dst0;
363342
364- let DestAddrMode = ToStack.Value;
365- let ResultAM = 3;
343+ let DestAddrMode = ToStack;
366344
367345 let Dst0 = dst0{3-0};
368346 let Imm1 = dst0{19-4};
@@ -391,8 +369,6 @@ class Irr_rr<EraVMOpcode opcode,
391369 : Irr_r<opcode, swap_operands, silent, outs, ins, asmstr, pattern> {
392370 bits<4> rd1;
393371
394- let DestAddrMode = ToRegReg.Value;
395-
396372 let Dst1 = rd1;
397373}
398374
@@ -419,8 +395,6 @@ class Iir_rr<EraVMOpcode opcode,
419395 : Iir_r<opcode, swap_operands, silent, outs, ins, asmstr, pattern> {
420396 bits<4> rd1;
421397
422- let DestAddrMode = ToRegReg.Value;
423-
424398 let Dst1 = rd1;
425399}
426400
@@ -464,8 +438,6 @@ class Imr_rr<EraVMOpcode opcode,
464438 : Imr_r<opcode, swap_operands, silent, outs, ins, asmstr, pattern> {
465439 bits<4> rd1;
466440
467- let DestAddrMode = ToRegReg.Value;
468-
469441 let Dst1 = rd1;
470442}
471443
@@ -477,8 +449,6 @@ class Isr_rr<EraVMOpcode opcode,
477449 : Isr_r<opcode, swap_operands, silent, outs, ins, asmstr, pattern> {
478450 bits<4> rd1;
479451
480- let DestAddrMode = ToRegReg.Value;
481-
482452 let Dst1 = rd1;
483453}
484454
@@ -505,8 +475,6 @@ class Irr_sr<EraVMOpcode opcode,
505475 : Irr_s<opcode, swap_operands, silent, outs, ins, asmstr, pattern> {
506476 bits<4> rd1;
507477
508- let DestAddrMode = ToStackReg.Value;
509-
510478 let Dst1 = rd1;
511479}
512480
@@ -533,8 +501,6 @@ class Iir_sr<EraVMOpcode opcode,
533501 : Iir_s<opcode, swap_operands, silent, outs, ins, asmstr, pattern> {
534502 bits<4> rd1;
535503
536- let DestAddrMode = ToStackReg.Value;
537-
538504 let Dst1 = rd1;
539505}
540506
@@ -578,8 +544,6 @@ class Imr_sr<EraVMOpcode opcode,
578544 : Imr_s<opcode, swap_operands, silent, outs, ins, asmstr, pattern> {
579545 bits<4> rd1;
580546
581- let DestAddrMode = ToStackReg.Value;
582-
583547 let Dst1 = rd1;
584548}
585549
@@ -591,8 +555,6 @@ class Isr_sr<EraVMOpcode opcode,
591555 : Isr_s<opcode, swap_operands, silent, outs, ins, asmstr, pattern> {
592556 bits<4> rd1;
593557
594- let DestAddrMode = ToStackReg.Value;
595-
596558 let Dst1 = rd1;
597559}
598560
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